公开(公告)号：US10181411B2

公开(公告)日：2019-01-15

申请号：US14950180

申请日：2015-11-24

Applicant: Invensas Corporation

Inventor： Michael Newman ,  Cyprian Uzoh ,  Charles G. Woychik ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H05K7/10 ,  H05K7/12 ,  H01L21/48 ,  H05K1/11 ,  H05K3/40 ,  H01L23/14 ,  H01L23/498 ,  H05K3/00

Abstract: An insulating second element is provided and overlies a surface of a first element which consists essentially of a material having a CTE of less than 10 ppm/° C. and has a first thickness in a first direction normal to the surface. Openings extend in the first direction through the second element. The first element is abraded to produce a thinned first element having a second thickness less than the first thickness. Conductive elements are formed at a first side of the interposer coincident with or adjacent to a surface of the thinned first element remote from the second element. A conductive structure extends through the openings in the second element, wherein the conductive elements are electrically connected with terminals of the interposer through the conductive structure, and the terminals are disposed at a second side of the interposer opposite from the first side.

公开(公告)号：US09799626B2

公开(公告)日：2017-10-24

申请号：US14852855

申请日：2015-09-14

Applicant: Invensas Corporation

Inventor： Cyprian Uzoh ,  Rajesh Katkar

IPC: H01L21/00 ,  H01L23/12 ,  H01L23/00 ,  H01L21/3213 ,  H01L23/498 ,  H01L21/822 ,  H01L23/31 ,  H01L25/07 ,  H01L25/11 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48 ,  H01L23/14 ,  H01L23/15

CPC classification number: H01L24/97 ,  H01L21/32133 ,  H01L21/486 ,  H01L21/561 ,  H01L21/822 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/072 ,  H01L25/115 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32013 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/83007 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compound, the stabilization layer is separated from at least some wafer areas around the ICs by one or more gap regions (450) to reduce the thermo-mechanical stress on the wafer and hence the wafer warpage. Alternatively or in addition, the stabilization layer can be a porous material having a low horizontal elastic modulus to reduce the wafer warpage, but having a high flexural modulus to reduce warpage and otherwise strengthen the structure for further processing. Other features and advantages are also provided.

公开(公告)号：US20160079214A1

公开(公告)日：2016-03-17

申请号：US14952064

申请日：2015-11-25

Applicant: Invensas Corporation

Inventor： Terrence Caskey ,  Ilyas Mohammed ,  Cyprian Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Reynaldo Co ,  Ellis Chau ,  Belgacem Haba

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H05K1/0298 ,  H05K3/46 ,  Y10T29/49126 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.

Abstract translation: 制造插入件的方法包括形成结合到第一元件的一个或多个第一表面的多个引线键合。 形成电介质封装，其接触将引线接合部彼此分隔开的引线接合的边缘表面。 进一步的处理包括去除第一元件的至少一部分，其中插入件具有通过至少封装相互隔开的第一和第二相对侧，并且插入件分别在第一和第二相对侧具有第一接触和第二接触， 分别与第一和第二部件电连接，第一触点通过引线键与第二触点电连接。

公开(公告)号：US20160079090A1

公开(公告)日：2016-03-17

申请号：US14950180

申请日：2015-11-24

Applicant: Invensas Corporation

Inventor： Michael Newman ,  Cyprian Uzoh ,  Charles G. Woychik ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/48 ,  H05K3/00

CPC classification number: H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L2224/13 ,  H01L2224/16225 ,  H05K1/111 ,  H05K3/0014 ,  H05K3/4038 ,  Y10T29/49117

Abstract: An interposer has conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component includes a first element having a thermal expansion coefficient less than 10 ppm/° C., and an insulating second element, with a plurality of openings extending from the second side through the second element towards the first element. A conductive structure extending through the openings in the second element and through the first element electrically connects the terminals with the conductive elements.

Abstract translation: 插入件在第一侧具有导电元件，在与其相对的第二侧具有端子，用于分别与微电子元件和第二元件连接。 该组件包括具有小于10ppm /℃的热膨胀系数的第一元件和绝缘的第二元件，多个开口从第二侧延伸穿过第二元件朝向第一元件。 延伸穿过第二元件中的开口并通过第一元件的导电结构将端子与导电元件电连接。