公开(公告)号：US10475733B2

公开(公告)日：2019-11-12

申请号：US16156595

申请日：2018-10-10

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/38 ,  H01L21/02 ,  H01L21/48 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L23/498 ,  H01L21/768 ,  H01L23/373 ,  H01L23/367 ,  H01L23/48 ,  H01L23/36

Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.

公开(公告)号：US10103094B2

公开(公告)日：2018-10-16

申请号：US15626687

申请日：2017-06-19

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC: H05K1/00 ,  H01L23/498 ,  H01L23/48 ,  H01L23/36 ,  H01L23/373 ,  H01L21/768 ,  H01L23/367

Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.

公开(公告)号：US09379008B2

公开(公告)日：2016-06-28

申请号：US14627252

申请日：2015-02-20

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/532 ,  H01L21/3205 ,  H01L23/14 ,  H01L23/525

CPC classification number: H01L21/76877 ,  H01L21/32055 ,  H01L21/76802 ,  H01L21/76841 ,  H01L21/76858 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/525 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).

公开(公告)号：US09064933B2

公开(公告)日：2015-06-23

申请号：US13724223

申请日：2012-12-21

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Michael Newman ,  Charles G. Woychik ,  Terrence Caskey

IPC: H01L21/4763 ,  H01L21/768 ,  H01L21/78 ,  H01L21/56 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/481 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Methods of forming a microelectronic assembly and the resulting structures and devices are disclosed herein. In one embodiment, a method of forming a microelectronic assembly includes removing material exposed at portions of a surface of a substrate to form a processed substrate having a plurality of thinned portions separated by integral supporting portions of the processed substrate having a thickness greater than a thickness of the thinned portions, at least some of the thinned portions including a plurality of electrically conductive interconnects extending in a direction of the thicknesses of the thinned portions and exposed at the surface; and removing the supporting portions of the substrate to sever the substrate into a plurality of individual thinned portions, at least some individual thinned portions including the interconnects.

Abstract translation: 本文公开了形成微电子组件的方法以及所得到的结构和装置。 在一个实施例中，形成微电子组件的方法包括去除在衬底的表面的部分处暴露的材料，以形成经处理的衬底，该衬底具有多个由处理衬底的整体支撑部分分隔开的薄化部分，该部分的厚度大于厚度 减薄部分中的至少一些薄化部分包括在薄壁部分的厚度方向上延伸并在表面露出的多个导电互连件; 以及去除衬底的支撑部分以将衬底切割成多个单独的薄化部分，至少一些单独的变薄部分，包括互连。

公开(公告)号：US09893030B2

公开(公告)日：2018-02-13

申请号：US15212603

申请日：2016-07-18

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman ,  Terrence Caskey

IPC: H05K7/00 ,  H01L23/00 ,  H05K1/18 ,  H05K3/30 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/1319 ,  H01L2224/14517 ,  H01L2224/1601 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16104 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16503 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81007 ,  H01L2224/811 ,  H01L2224/81139 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/9201 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00014 ,  H05K1/181 ,  H05K3/30 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2224/05552

Abstract: Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction.

公开(公告)号：US09691693B2

公开(公告)日：2017-06-27

申请号：US14096387

申请日：2013-12-04

Applicant: Invensas Corporation

Inventor： Andrew Cao ,  Michael Newman

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L25/16 ,  H01L23/14 ,  H01L23/13 ,  H01L23/00

CPC classification number: H01L21/4853 ,  H01L21/486 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/0237 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A component, e.g., interposer has first and second opposite sides, conductive elements at the first side and terminals at the second side. The terminals can connect with another component, for example. A first element at the first side can comprise a first material having a thermal expansion coefficient less than 10 ppm/° C., and a second element at the second side can comprise a plurality of insulated structures separated from one another by at least one gap. Conductive structure extends through at least one insulated structure and is electrically coupled with the terminals and the conductive elements. The at least one gap can reduce mechanical stress in connections between the terminals and another component.

公开(公告)号：US09502390B2

公开(公告)日：2016-11-22

申请号：US13795756

申请日：2013-03-12

Applicant: Invensas Corporation

Inventor： Terrence Caskey ,  Ilyas Mohammed ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Reynaldo Co ,  Ellis Chau ,  Belgacem Haba

IPC: H05K1/02 ,  H01L25/10 ,  H05K3/46 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H05K1/0298 ,  H05K3/46 ,  Y10T29/49126 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.

Abstract translation: 制造插入件的方法包括形成结合到第一元件的一个或多个第一表面的多个引线键合。 形成电介质封装，其接触将引线接合部彼此分隔开的引线接合的边缘表面。 进一步的处理包括去除第一元件的至少一部分，其中插入件具有通过至少封装相互隔开的第一和第二相对侧，并且插入件分别在第一和第二相对侧具有第一接触和第二接触， 分别与第一和第二部件电连接，第一触点通过引线键与第二触点电连接。

公开(公告)号：US20160079090A1

公开(公告)日：2016-03-17

申请号：US14950180

申请日：2015-11-24

Applicant: Invensas Corporation

Inventor： Michael Newman ,  Cyprian Uzoh ,  Charles G. Woychik ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/48 ,  H05K3/00

CPC classification number: H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L2224/13 ,  H01L2224/16225 ,  H05K1/111 ,  H05K3/0014 ,  H05K3/4038 ,  Y10T29/49117

Abstract: An interposer has conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component includes a first element having a thermal expansion coefficient less than 10 ppm/° C., and an insulating second element, with a plurality of openings extending from the second side through the second element towards the first element. A conductive structure extending through the openings in the second element and through the first element electrically connects the terminals with the conductive elements.

Abstract translation: 插入件在第一侧具有导电元件，在与其相对的第二侧具有端子，用于分别与微电子元件和第二元件连接。 该组件包括具有小于10ppm /℃的热膨胀系数的第一元件和绝缘的第二元件，多个开口从第二侧延伸穿过第二元件朝向第一元件。 延伸穿过第二元件中的开口并通过第一元件的导电结构将端子与导电元件电连接。

公开(公告)号：US09123780B2

公开(公告)日：2015-09-01

申请号：US13720346

申请日：2012-12-19

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/36 ,  H01L23/367

CPC classification number: H01L23/49827 ,  H01L21/76829 ,  H01L21/76898 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2924/00 ,  H01L2924/0002

Abstract: A method for making an interconnect element includes depositing a thermally conductive layer on an in-process unit. The in-process unit includes a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer and a second portion extending from the surface of the semiconductor material layer. Dielectric coatings extend over at least the second portion of each conductive element. The thermally conductive layer is deposited on the in-process unit at a thickness of at least 10 microns so as to overlie a portion of the surface of the semiconductor material layer between the second portions of the conductive elements with the dielectric coatings positioned between the conductive elements and the thermally conductive layer.

Abstract translation: 制造互连元件的方法包括将热传导层沉积在处理单元上。 处理单元包括限定表面和围绕表面的边缘的半导体材料层，多个导电元件，每个导电元件具有延伸穿过半导体材料层的第一部分和从半导体材料的表面延伸的第二部分 层。 电介质涂层至少延伸到每个导电元件的第二部分。 导热层以至少10微米的厚度沉积在处理单元上，以覆盖在导电元件的第二部分之间的半导体材料层的表面的一部分，其中介电涂层位于导电 元件和导热层。

公开(公告)号：US20150162241A1

公开(公告)日：2015-06-11

申请号：US14627252

申请日：2015-02-20

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L21/76877 ,  H01L21/32055 ,  H01L21/76802 ,  H01L21/76841 ,  H01L21/76858 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/525 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).

Abstract translation: 本文公开了其形成的结构和方法。 在一个实施例中，结构可以包括具有第一和第二相对面的表面的区域。 屏障区域可以覆盖该区域。 合金区域可以覆盖阻挡区域。 合金区域可以包括第一金属和选自硅（Si），锗（Ge），铟（Id），硼（B），砷（As），锑（Sb），碲的一种或多种元素 （Te）或镉（Cd）。