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35 条记录 (耗时 0.023 秒)

    Magnetic memory element having controlled nucleation site in data layer
    11.
    发明授权
    Magnetic memory element having controlled nucleation site in data layer 有权
    磁记忆元件在数据层中具有受控的成核位点

    公开(公告)号：US06905888B2

    公开(公告)日：2005-06-14

    申请号：US10676414

    申请日：2003-09-30

    申请人： Janice H. Nickel ,  Manoj Bhattacharyya

    发明人： Janice H. Nickel ,  Manoj Bhattacharyya

    IPC分类号： G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  H01L21/00

    CPC分类号： G11C11/16 ,  G11C11/15

    摘要： A ferromagnetic data layer of a magnetic memory element is formed with a controlled nucleation site. In some embodiments, the nucleation site may be a divot in the data layer or a protrusion from the data layer. A Magnetic Random Access Memory (“MRAM”) device may include an array of magnetic memory elements having data layers with controlled nucleation sites.

    摘要翻译： 磁记忆元件的铁磁数据层形成有受控的成核位点。 在一些实施方案中，成核位点可以是数据层中的裂缝或来自数据层的突起。 磁性随机存取存储器（“MRAM”）器件可以包括具有受控成核位点的数据层的磁存储元件阵列。

    Magnetic memory element having controlled nucleation site in data layer
    13.
    发明授权
    Magnetic memory element having controlled nucleation site in data layer 有权
    磁记忆元件在数据层中具有受控的成核位点

    公开(公告)号：US06803616B2

    公开(公告)日：2004-10-12

    申请号：US10173195

    申请日：2002-06-17

    申请人： Janice H. Nickel ,  Manoj Bhattacharyya

    发明人： Janice H. Nickel ,  Manoj Bhattacharyya

    IPC分类号： H01L2976

    CPC分类号： G11C11/16 ,  G11C11/15

    摘要： A ferromagnetic data layer of a magnetic memory element is formed with a controlled nucleation site. The controlled nucleation sites improve the switching distribution of the magnetic memory elements, which increases reliability of writing to the magnetic memory elements. A Magnetic Random Access Memory (MRAM) device may include an array of such magnetic memory elements.

    摘要翻译： 磁记忆元件的铁磁数据层形成有受控的成核位点。 受控的成核位点改善了磁存储元件的开关分布，这增加了写入磁存储元件的可靠性。 磁性随机存取存储器（MRAM）装置可以包括这种磁存储元件的阵列。

    Over-temperature warning device
    14.
    发明授权
    Over-temperature warning device 有权
    超温报警装置

    公开(公告)号：US06564742B2

    公开(公告)日：2003-05-20

    申请号：US09921145

    申请日：2001-08-03

    申请人： Frederick A Perner ,  Thomas Anthony ,  Manoj Bhattacharyya

    发明人： Frederick A Perner ,  Thomas Anthony ,  Manoj Bhattacharyya

    IPC分类号： G01K1106

    CPC分类号： G01K11/06

    摘要： A critical temperature warning apparatus and method to monitor the thermal history of a product such as a memory card. The apparatus comprises a critical temperature indicator, which is externally attached to a product to be monitored. The indicator indicates if the product has experienced a critical temperature. The critical temperature indicator may comprise a patterned array of wax, the wax having a melting point equal to the critical temperature. If the pattern of wax has been destroyed leaving a molten wax residue, then this indicates that the product has experienced a critical temperature. The critical temperature indicator may also include thermographic inks for indicating that a critical temperature has been experienced.

    摘要翻译： 一种用于监测诸如存储卡的产品的热历史的临界温度警告装置和方法。 该装置包括临时温度指示器，其外部附接到要监视的产品。 该指示器指示产品是否经历了临界温度。 临界温度指示器可以包括蜡的图案化阵列，蜡的熔点等于临界温度。 如果蜡的图案被破坏，留下熔融的蜡残留物，则表明该产品已经经历了临界温度。 临界温度指示器还可以包括用于指示经历了临界温度的热成像油墨。

    Magnetic memory having a temperature compensated write circuit
    17.
    发明授权
    Magnetic memory having a temperature compensated write circuit 有权
    具有温度补偿写入电路的磁存储器

    公开(公告)号：US06775196B2

    公开(公告)日：2004-08-10

    申请号：US10194767

    申请日：2002-07-12

    申请人： Frederick A. Perner ,  Manoj Bhattacharyya

    发明人： Frederick A. Perner ,  Manoj Bhattacharyya

    IPC分类号： G11C704

    CPC分类号： G11C7/04 ,  G11C11/16

    摘要： A magnetic memory is disclosed. In one embodiment, the magnetic memory includes a magnetic memory cell, a conductor which crosses the magnetic memory cell and a circuit coupled to the conductor configured to apply a modified magnetic field to the magnetic memory cell in response to temperature variations in the magnetic memory cell.

    摘要翻译： 公开了磁存储器。 在一个实施例中，磁存储器包括磁存储器单元，穿过磁存储单元的导体和耦合到导体的电路，该电路被配置为响应于磁存储单元中的温度变化而将修改的磁场施加到磁存储单元 。

    Low power MRAM memory array
    18.
    发明授权
    Low power MRAM memory array 有权
    低功耗MRAM存储器阵列

    公开(公告)号：US06466471B1

    公开(公告)日：2002-10-15

    申请号：US09865596

    申请日：2001-05-29

    申请人： Manoj Bhattacharyya

    发明人： Manoj Bhattacharyya

    IPC分类号： G11C702

    CPC分类号： G11C11/16

    摘要： An MRAM memory array has nonlinear word lines and linear bit lines. The word lines cross the bit lines at memory cell locations, and are substantially coextensive with the bit lines at the crossing points. When a current is passed through the word and bit lines, the magnetic fields generated by the word line and the bit line at a coextensive portion are substantially aligned. The magnitude of the resultant field is therefore greater than in conventional, orthogonally oriented fields. Because the addition of the fields generated by the word and bit lines is enhanced, smaller word and bit line currents can be utilized, which reduces the size required for the memory array. The memory array can also utilize memory cells having a magnetic layer for producing a transverse magnetic field. The transverse field is orthogonally oriented to the magnetic field generated by the word and bit lines, and increases the reproducibility of switching of the memory cell. The transverse field also reduces the current required to switch the memory cell.

    摘要翻译： MRAM存储器阵列具有非线性字线和线性位线。 字线在存储单元位置处与位线交叉，并且在交叉点处与位线基本上共同延伸。 当电流通过字线和位线时，由共线延伸部分上的字线和位线产生的磁场基本对齐。 因此，所得场的幅度大于常规的正交取向场。 由于增加了由字和位线产生的场的增加，可以利用更小的字和位线电流，这减小了存储器阵列所需的尺寸。 存储器阵列还可以利用具有用于产生横向磁场的磁性层的存储单元。 横向场与由字和位线产生的磁场正交地取向，并增加了存储单元切换的再现性。 横向场还减少了切换存储单元所需的电流。

    Optimal write conductors layout for improved performance in MRAM
    19.
    发明授权
    Optimal write conductors layout for improved performance in MRAM 有权
    最佳写导体布局，以提高MRAM的性能

    公开(公告)号：US06236590B1

    公开(公告)日：2001-05-22

    申请号：US09624134

    申请日：2000-07-21

    申请人： Manoj Bhattacharyya ,  Thomas Anthony

    发明人： Manoj Bhattacharyya ,  Thomas Anthony

    IPC分类号： G11C1115

    CPC分类号： G11C11/16 ,  G11C11/15 ,  H01L27/222

    摘要： An optimal write conductor layout structure for improved MRAM performance is disclosed. A write conductor layout structure for a magnetic memory cell includes a data storage layer having a first layer width in a first direction and a second layer width in a second direction. The data storage layer is positioned between a first conductor having a first width in the first direction and a second conductor having a second width in the second direction. The first and second conductors cross the data storage layer in the first and second directions respectively. The first width of the first conductor is less than the first layer width of the data storage layer and the first width of the first conductor is positioned so that the first layer width overlaps the entirety of the first width of the first conductor. The second width of the second conductor is less than the second layer width of the data storage layer and the second width of the second conductor is positioned so that the second layer width overlaps the entirety of the second width of the second conductor. The narrow widths of the first and second conductors eliminates misalignment between the conductors and the data storage layer, reduces leakage of a write magnetic field generated by currents applied to the first and second conductors, and can generate the write magnetic field with less current thereby reducing power consumption in the memory cell.

    摘要翻译： 公开了一种用于改进MRAM性能的最佳写导体布局结构。 用于磁存储单元的写导体布局结构包括在第一方向具有第一层宽度和在第二方向上具有第二层宽度的数据存储层。 数据存储层位于第一方向具有第一宽度的第一导体和第二方向上具有第二宽度的第二导体之间。 第一和第二导体分别在第一和第二方向上与数据存储层交叉。 第一导体的第一宽度小于数据存储层的第一层宽度，并且第一导体的第一宽度被定位成使得第一层宽度与第一导体的整个第一宽度重叠。 第二导体的第二宽度小于数据存储层的第二层宽度，并且第二导体的第二宽度被定位成使得第二层宽度与第二导体的整个第二宽度重叠。 第一和第二导体的窄宽度消除了导体和数据存储层之间的不对准，减少了由施加到第一和第二导体的电流产生的写磁场的泄漏，并且可以以较小的电流产生写入磁场，从而减少 存储单元中的功耗。