公开(公告)号：US10177174B2

公开(公告)日：2019-01-08

申请号：US15617547

申请日：2017-06-08

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US20180061857A1

公开(公告)日：2018-03-01

申请号：US15682594

申请日：2017-08-22

Applicant: Japan Display Inc.

Inventor： Noriyoshi KANDA ,  Arichika Ishida ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L51/00 ,  H01L51/50

CPC classification number: H01L27/124 ,  H01L27/1203 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0002 ,  H01L51/0094 ,  H01L51/5012

Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.

公开(公告)号：US20160149047A1

公开(公告)日：2016-05-26

申请号：US14944711

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Takashi Okada ,  Masayoshi Fuchi ,  Akihiro Hanada

IPC: H01L29/786 ,  H01L23/00 ,  H01L21/385 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.

Abstract translation: 根据一个实施例，薄膜晶体管及其制造方法在使用氧化物半导体层时实现薄膜晶体管的尺寸减小。 氧化物半导体层包括沟道区，源极区和漏极区。 栅电极配置在与氧化物半导体层的沟道区隔开的位置，以面对沟道区。 源极电极与氧化物半导体层的源极区电连接。 漏电极与氧化物半导体层的漏区电连接。 底涂层邻接氧化物半导体层的源极区和漏极区。 氢阻挡层的氢浓度低于底涂层中的氢浓度，并分离底涂层和氧化物半导体层的沟道区。

公开(公告)号：US11935898B2

公开(公告)日：2024-03-19

申请号：US17031999

申请日：2020-09-25

Applicant: Japan Display Inc.

Inventor： Tatsuya Toda ,  Toshinari Sasaki ,  Masayoshi Fuchi

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3266 ,  H10K59/12 ,  H10K59/123 ,  H10K59/124 ,  H10K59/131

CPC classification number: H01L27/124 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3266 ,  H01L27/1259 ,  H10K59/123 ,  H10K59/124 ,  H10K59/131 ,  G02F1/136295 ,  G09G2300/0861 ,  H01L27/1225 ,  H01L27/1255 ,  H10K59/1201

Abstract: A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.

公开(公告)号：US11855103B2

公开(公告)日：2023-12-26

申请号：US17587671

申请日：2022-01-28

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L21/02063 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/7869 ,  H01L29/78603 ,  H01L29/78675

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US10374096B2

公开(公告)日：2019-08-06

申请号：US15713077

申请日：2017-09-22

Applicant: Japan Display Inc.

Inventor： Miyuki Ishikawa ,  Arichika Ishida ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/66 ,  H01L21/441 ,  H01L21/465 ,  H01L21/467 ,  H01L29/417 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.

公开(公告)号：US20180226498A1

公开(公告)日：2018-08-09

申请号：US15880673

申请日：2018-01-26

Applicant: Japan Display Inc.

Inventor： Toshinari SASAKI ,  Masahiro Watabe ,  Masayoshi Fuchi ,  Isao Suzumura ,  Marina Shiokawa

IPC: H01L29/66 ,  H01L21/385 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/385 ,  H01L21/477 ,  H01L29/78609 ,  H01L29/7869

Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.

公开(公告)号：US09911859B2

公开(公告)日：2018-03-06

申请号：US14944711

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Takashi Okada ,  Masayoshi Fuchi ,  Akihiro Hanada

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.

公开(公告)号：US09831349B2

公开(公告)日：2017-11-28

申请号：US14725361

申请日：2015-05-29

Applicant: Japan Display Inc.

Inventor： Miyuki Ishikawa ,  Arichika Ishida ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L21/441 ,  H01L21/465 ,  H01L21/467 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

CPC classification number: H01L29/7869 ,  H01L21/441 ,  H01L21/465 ,  H01L21/467 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3272 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78633 ,  H01L29/78696

Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.

公开(公告)号：US09647134B2

公开(公告)日：2017-05-09

申请号：US15051786

申请日：2016-02-24

Applicant: Japan Display Inc.

Inventor： Masato Hiramatsu ,  Masayoshi Fuchi ,  Arichika Ishida

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02 ,  H01L21/465 ,  H01L21/443 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/443 ,  H01L21/465 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor comprises an oxide semiconductor layer formed on a part of a substrate, a first gate insulator film of a silicon dioxide film formed on the oxide semiconductor layer and by the CVD method with a silane-based source gas, a second gate insulator film of a silicon dioxide film formed on the first gate insulator film by the CVD method with a TEOS source gas, and a gate electrode formed on the second gate insulator film.