Abstract:
A simplified tri-layer process for forming a thin film transistor matrix for a liquid crystal display is disclosed. By using a backside exposure technique, the masking step for patterning an etch stopper layer can be omitted. After forming an active region including a gate electrode and a scan line on the front side of a substrate, and sequentially applying an etch stopper layer and a photoresist layer over the resulting structure, the backside exposure is performed by exposing from the back side of the substrate. A portion of photoresist is shielded by the active region from exposure so that an etch stopper structure having a shape similar to the shape of the active region is formed without any photo-masking and lithographic procedure. Therefore, the above self-aligned effect allows one masking step to be reduced so as to simplify the process.
Abstract:
A method for fabricating a capacitor electrode on a semiconductor substrate includes the steps of: forming a conducting layer over the semiconductor substrate; forming a photoresist layer over the conducting layer; pattering the photoresist layer through an interfering exposure step; and pattering the conducting layer using the patterned photoresist layer as a mask, thereby forming a capacitor electrode.
Abstract:
A method of fabricating a rugged capacitor structure of high density Dynamic Random Access Memory (DRAM) cells is disclosed. First, MOSFETs, wordlines and bitlines are formed on a semiconductor silicon substrate. Next, a dielectric layer and a doped polysilicon layer are sequentially deposited over the entire silicon substrate. The dielectric layer and doped polysilicon layer are then partially etched to open source contact windows. Then, a polysilicon layer is deposited overlaying the doped polysilicon layer and filling into the source contact windows. Next, the polysilicon layer and doped polysilicon layers are partially etched to define bottom electrodes of the capacitors. Next, tilt angle implantation is performed to implant impurities into top surface and four sidewalls of the polysilicon layer and doped polysilicon layer. Next, a rugged polysilicon layer is deposited overlaying the polysilicon, doped polysilicon and third dielectric layers. Next, the polysilicon layer is anisotropically etched by using the rugged polysilicon layer as an etching mask to transfer rugged surface profile from the rugged polysilicon layer to the polysilicon layer. Finally, an interelectrode dielectric layer and a third polysilicon layer as top electrodes of the capacitors are sequentially formed to complete the rugged capacitor for high density DRAM applications.
Abstract:
The screen of a liquid crystal display is first divided into a compensation portion, a compensation transition portion and a non-compensation portion in a sequence arranged along the scanning line. Then storage capacitor areas of the pixels in the non-compensation portion are made equal, whereas the difference between the storage capacitor area of the pixel in the compensation portion and that in the non-compensation portion is set to one constant basic compensation area. Afterward, the average of the storage capacitor areas of the pixels on each data line in the compensation transition portion progressively varies along the scanning line, where the average is greater than or equal to any of the storage capacitor areas of the pixels in the non-compensation portion. The direction of the scanning line is designated as either the direction in which scanning signals are transmitted or the direction opposite thereto.
Abstract:
A liquid crystal display panel with reduced flicker comprises an active matrix substrate equipped with a plurality of thin film transistors. The active matrix substrate has an active area that is formed with a plurality of first signal lines and a plurality of second signal lines crossing each other. The active area includes a plurality of pixels arranged in a matrix. There are outer-lead bonding areas around the active area. There are a plurality of pad areas within the outer-lead bonding areas. A plurality of second wires arranged in a fan-out configuration extend from the pad areas and stretch toward the active area. The second wires are connected to their respective first signal lines by their serpentine or zigzag routes resulting in various wire lengths. A frame-like lead overlaps the second wires, and a capacitor exists between each of the second wires and the closed frame-like lead. The induced capacitor and the resistance of the corresponding second wire together result in a compensation effect so as to uniform the time constants of the plurality of first signal lines.
Abstract:
A reflective liquid crystal display panel for dual display. The panel has a plurality of pixels and each pixel having first and second display regions. Each pixel includes a first substrate and a second substrate opposite thereto, wherein the first substrate includes a pixel driving device. A first reflective layer is formed overlying the first substrate in the first display region. A second reflective layer is formed overlying an interior of the second substrate in the second display region. A liquid crystal layer is interposed between the first substrate and the second substrate.
Abstract:
A pixel structure and repair method thereof. A through hole is formed in the common line. When the source/drain electrode of a thin film transistor is not electrically connected to a pixel electrode due to a polymer residue remaining in a contact hole, a first laser beam passes through the through hole to weld the source/drain electrode and the pixel electrode. The defective pixel can be thus repaired to display the original color. In addition, if the defective pixel fails due to a defective thin film transistor, the invention irradiates a second laser beam to sever the source/drain electrode such that the defective thin film transistor is not electrically connected to the pixel electrode. The defective pixel can be thus repaired to a dark point.
Abstract:
A structure of the TFT array includes an additional row of pixel electrode coupled to the last scanning line for the last pixel electrode row. The last pixel electrode row has overlap with the last scanning line to form the equivalent storage capacitor. In addition, the liquid crystal exists on a portion of the pixel electrode row without overlapping with the last scanning line, resulting in the liquid crystal capacitor, which equivalent to the liquid crystal capacitor for the other scanning lines. The pixel electrode row can compensate the miss capacitance from the storage capacitor and the liquid crystal capacitor for the last scanning line. As a result, the difference of capacitive effect for the edge scanning line and the other scanning lines can be balanced, so as to improve the displaying quality.
Abstract:
A method of forming a TFT structure is performed on a glass substrate. A first metal layer deposited on the glass substrate is patterned with a first mask to form a gate line and a gate electrode. Next, a gate insulating layer, a first semiconductor layer and an etch-stop layer are successively formed, and backside exposure patterns the etch-stop layer. Thus, the remaining part of the etch-stop layer is disposed over the gate electrode and the gate line. Next, a second semiconductor layer and a second metal layer are successively formed, and then the second metal layer is patterned with a second mask to form a data line perpendicular to the gate line. Thereafter, the second semiconductor layer and the first semiconductor layer not covered by the second metal layer are removed. Next, a first protection layer formed on the exposed surface of the glass substrate is patterned with a third mask to form a first opening and a second opening, wherein the first opening is over the gate electrode and the second opening is over a predetermined drain electrode. Next, a conductive layer and a photoresist layer successively formed on the exposed surface of the glass substrate are patterned with a fourth mask to form a pattern of a predetermined pixel electrode. Finally, after removing the second metal layer and the second semiconductor layer underlying the first opening to expose the etch-stop layer, a second protection layer is formed on the first protection layer to fill the first opening.
Abstract:
A low color shift liquid crystal display and a driving method thereof are provided. The liquid crystal display comprises a plurality of data lines; a plurality of scanning lines arranged across the plurality of data lines, two adjacent scanning lines and two adjacent data lines arranged across the two adjacent scanning lines together defining a pixel region; and a plurality of pixels each comprising a first and a second sub-pixels. The first sub-pixel is connected to a first scanning line of the two adjacent scanning lines, the second sub-pixel includes a compensation capacitor, which is coupled to a second scanning line of the two adjacent scanning lines. Thereby a voltage difference can be maintained between the two sub-pixels under the same driving condition, and the voltage difference can be easily adjusted by suitably changing the waveforms of scanning drive signals on the scanning lines.