公开(公告)号：US20050157573A1

公开(公告)日：2005-07-21

申请号：US11085009

申请日：2005-03-21

申请人： Kristy Campbell ,  Terry Gilton ,  John Moore ,  Jiutao Li

发明人： Kristy Campbell ,  Terry Gilton ,  John Moore ,  Jiutao Li

IPC分类号： G11C7/00 ,  H01L21/8234 ,  H01L33/00 ,  H01L45/00

CPC分类号： H01L45/085 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1641 ,  H01L45/1658 ,  H01L45/1683

摘要： A method of forming a non-volatile resistance variable device includes forming a first conductive electrode material on a substrate. A metal doped chalcogenide comprising material is formed over the first conductive electrode material. Such comprises the metal and AxBy, where “B” is selected from S, Se and Te and mixtures thereof, and where “A” comprises at least one element which is selected from Group 13, Group 14, Group 15, or Group 17 of the periodic table. In one aspect, the chalcogenide comprising material is exposed to and HNO3 solution. In one aspect the outer surface is oxidized effective to form a layer comprising at least one of an oxide of “A” or an oxide of “B”. In one aspect, a passivating material is formed over the metal doped chalcogenide comprising material. A second conductive electrode material is deposited, and a second conductive electrode material of the device is ultimately formed therefrom.

摘要翻译： 形成非易失性电阻可变器件的方法包括在衬底上形成第一导电电极材料。 在第一导电电极材料上形成包含材料的掺杂金属的硫族化物。 其中“B”选自S，Se和Te及其混合物，其中“A”包括至少一个元素 其选自周期表的第13组，第14组，第15组或第17组。 在一个方面，包含硫属元素的材料暴露于HNO 3溶液中。 在一个方面，外表面被有效地氧化以形成包含“A”的氧化物或“B”的氧化物中的至少一种的层。 在一个方面，在包含金属的硫族化物的材料上形成钝化材料。 沉积第二导电电极材料，并且最终由器件的第二导电电极材料形成。

公开(公告)号：US20050148150A1

公开(公告)日：2005-07-07

申请号：US10988836

申请日：2004-11-16

申请人： John Moore ,  Kristy Campbell ,  Terry Gilton

发明人： John Moore ,  Kristy Campbell ,  Terry Gilton

IPC分类号： C23C14/06 ,  C23C16/30 ,  H01L45/00 ,  H01L21/20

CPC分类号： C23C16/305 ,  C23C14/0623 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/143 ,  H01L45/1616 ,  H01L45/1625 ,  Y10T428/12694

摘要： A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass layer, formed over a first metal containing layer, formed over a first chalcogenide glass layer. The thin metal containing layer preferably is a silver layer. An electrode may be formed over the thin silver layer. The electrode preferably does not contain silver.

摘要翻译： 本文公开了一种用于控制电阻变量存储元件中硫族化物玻璃的银掺杂的方法。 该方法包括在第一硫族化物玻璃层上形成的厚度小于约250埃的含金属薄层，形成在第一硫族化物玻璃层上形成的第一金属含层上。 含金属薄层优选为银层。 可以在薄银层上方形成电极。 电极优选不含银。

公开(公告)号：US20050133778A1

公开(公告)日：2005-06-23

申请号：US11033873

申请日：2005-01-13

申请人： Kristy Campbell ,  Terry Gilton ,  John Moore ,  Joseph Brooks

发明人： Kristy Campbell ,  Terry Gilton ,  John Moore ,  Joseph Brooks

IPC分类号： C03C3/32 ,  C03C17/02 ,  G05F1/44 ,  G11C16/02 ,  H01L27/00 ,  H01L29/06 ,  H01L45/00

CPC分类号： C03C3/321 ,  C03C17/02 ,  G11C13/0004 ,  G11C13/0011 ,  G11C27/00 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/143 ,  H01L45/1608 ,  H01L45/1641

摘要： The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.

公开(公告)号：US20070166983A1

公开(公告)日：2007-07-19

申请号：US11598089

申请日：2006-11-13

申请人： Jun Liu ,  Terry Gilton ,  John Moore

发明人： Jun Liu ,  Terry Gilton ,  John Moore

IPC分类号： H01L21/44

CPC分类号： H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/16

摘要： A memory element comprising first and second electrodes is provided. The first electrode is tapered such that a first end of the first electrode is larger than a second end of the first electrode. A resistance variable material layer is located between the first and second electrodes, and the second end of the first electrode is in contact with the resistance variable material. Methods for forming the memory element are also provided.

摘要翻译： 提供包括第一和第二电极的存储元件。 第一电极是锥形的，使得第一电极的第一端大于第一电极的第二端。 电阻可变材料层位于第一和第二电极之间，第一电极的第二端与电阻变化材料接触。 还提供了形成存储元件的方法。

公开(公告)号：US20060126370A1

公开(公告)日：2006-06-15

申请号：US11346386

申请日：2006-02-03

申请人： John Moore ,  Terry Gilton

发明人： John Moore ,  Terry Gilton

IPC分类号： G11C5/06 ,  G11C11/00

CPC分类号： G11C13/003 ,  G11C5/063 ,  G11C7/18 ,  G11C11/4097 ,  G11C13/0011 ,  G11C13/004 ,  G11C2213/75 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0203 ,  H01L27/105 ,  H01L27/1052

摘要： An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

公开(公告)号：US20070091666A1

公开(公告)日：2007-04-26

申请号：US11581748

申请日：2006-10-17

申请人： John Moore ,  Terry Gilton

发明人： John Moore ,  Terry Gilton

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C5/063 ,  G11C7/18 ,  G11C11/4097 ,  G11C13/0011 ,  G11C13/004 ,  G11C2213/75 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0203 ,  H01L27/105 ,  H01L27/1052

摘要： An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

摘要翻译： 一种架构及其形成和操作方法，其包含半易失性或非易失性存储器元件的高密度存储器阵列，包括但不限于可编程导电存取存储器元件。 一个示例性实施例中的架构具有一对半挥发性或非易失性存储器元件，其通过相应的第一电极和由相应字线控制的存取晶体管选择性地共享位线。 存储元件各自具有耦合到其上的相应的第二电极，其与位线存取晶体管和第一电极协作，用于向存储元件施加读取，写入和擦除信号。

公开(公告)号：US20070008761A1

公开(公告)日：2007-01-11

申请号：US11521356

申请日：2006-09-15

申请人： John Moore ,  Terry Gilton

发明人： John Moore ,  Terry Gilton

IPC分类号： G11C5/02

CPC分类号： G11C13/003 ,  G11C5/063 ,  G11C7/18 ,  G11C11/4097 ,  G11C13/0011 ,  G11C13/004 ,  G11C2213/75 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0203 ,  H01L27/105 ,  H01L27/1052

摘要： An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

公开(公告)号：US20050122757A1

公开(公告)日：2005-06-09

申请号：US10725557

申请日：2003-12-03

申请人： John Moore ,  Terry Gilton

发明人： John Moore ,  Terry Gilton

IPC分类号： G11C5/06 ,  G11C7/18 ,  G11C11/4097 ,  G11C16/02 ,  H01L21/8239 ,  H01L27/02 ,  H01L27/105

CPC分类号： G11C13/003 ,  G11C5/063 ,  G11C7/18 ,  G11C11/4097 ,  G11C13/0011 ,  G11C13/004 ,  G11C2213/75 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0203 ,  H01L27/105 ,  H01L27/1052

摘要： An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

摘要翻译： 一种架构及其形成和操作方法，其包含半易失性或非易失性存储器元件的高密度存储器阵列，包括但不限于可编程导电存取存储器元件。 一个示例性实施例中的架构具有一对半挥发性或非易失性存储器元件，其通过相应的第一电极和由相应字线控制的存取晶体管选择性地共享位线。 存储元件各自具有耦合到其上的相应的第二电极，其与位线存取晶体管和第一电极协作，用于向存储元件施加读取，写入和擦除信号。

公开(公告)号：US20060131556A1

公开(公告)日：2006-06-22

申请号：US11018366

申请日：2004-12-22

申请人： Jun Liu ,  Terry Gilton ,  John Moore

发明人： Jun Liu ,  Terry Gilton ,  John Moore

IPC分类号： H01L29/04

CPC分类号： H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/16

摘要： A memory element comprising first and second electrodes is provided. The first electrode is tapered such that a first end of the first electrode is larger than a second end of the first electrode. A resistance variable material layer is located between the first and second electrodes, and the second end of the first electrode is in contact with the resistance variable material. Methods for forming the memory element are also provided.

摘要翻译： 提供包括第一和第二电极的存储元件。 第一电极是锥形的，使得第一电极的第一端大于第一电极的第二端。 电阻可变材料层位于第一和第二电极之间，第一电极的第二端与电阻变化材料接触。 还提供了形成存储元件的方法。

公开(公告)号：US20060006421A1

公开(公告)日：2006-01-12

申请号：US11219742

申请日：2005-09-07

申请人： John Moore ,  Terry Gilton

发明人： John Moore ,  Terry Gilton

IPC分类号： H01L27/10

CPC分类号： H01L45/04 ,  H01L27/101 ,  H01L28/24 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1658 ,  H01L45/1675

摘要： A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices. In one implementation, a non-volatile resistance variable device in a highest resistance state for a given ambient temperature and pressure includes a resistance variable chalcogenide material having metal ions diffused therein. Opposing first and second electrodes are received operatively proximate the resistance variable chalcogenide material. At least one of the electrodes has a conductive projection extending into the resistance variable chalcogenide material.

摘要翻译： 金属掺杂硫族化物材料的方法包括在衬底上形成金属。 在金属上形成硫族化物材料。 通过硫属化物材料对金属进行辐射，有效地在金属和硫族化物材料的界面处破坏硫族化物材料的硫族化物键，并将至少一些金属向外扩散到硫族化物材料中。 金属掺杂硫族化物材料的方法包括用硫族化物材料包围突出的金属块的暴露的外表面。 通过硫族化物材料将辐射照射到突出金属质量块上，有效地在突出的金属质量外表面的界面处破坏硫族化物材料的硫族化物键，并将至少一些突出的金属块向外扩散到硫族化物材料中。 在某些方面，上述实施方式被并入形成非易失性电阻可变器件的方法中。 在一个实施方案中，对于给定的环境温度和压力，最高电阻状态的非易失性电阻可变器件包括在其中扩散有金属离子的电阻变化硫属化物材料。 反向的第一和第二电极在电阻可变硫属化物材料上可操作地接收。 至少一个电极具有延伸到电阻可变硫族化物材料中的导电突起。