公开(公告)号：US4484153A

公开(公告)日：1984-11-20

申请号：US251559

申请日：1981-04-06

Applicant: Jaime A. Borras ,  Ruben J. Gonzalez ,  Daniel M. Smith ,  Jose I. Suarez ,  Alan M. Victor ,  Alfred B. Wieczorek

Inventor： Jaime A. Borras ,  Ruben J. Gonzalez ,  Daniel M. Smith ,  Jose I. Suarez ,  Alan M. Victor ,  Alfred B. Wieczorek

IPC: H03C3/09 ,  H03C3/22 ,  H03D13/00 ,  H03J5/02 ,  H03K23/66 ,  H03L7/08 ,  H03L7/193 ,  H03L7/199 ,  H04B1/40 ,  H03L7/18

CPC classification number: H03K21/38 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/0958 ,  H03C3/0966 ,  H03C3/227 ,  H03D13/005 ,  H03J5/0281 ,  H03K23/667 ,  H03L7/0802 ,  H03L7/193 ,  H03L7/199 ,  H04B1/405

Abstract: In a frequency synthesizer phase locked loop including a reference oscillator, a variable reference divider (.div.M), a sample and hold phase detector, a loop filter, a voltage controlled oscillator and a variable divider (.div.N), a voltage converter for controlling the voltage of a control input to the voltage controlled oscillator is disclosed. In the preferred embodiment, the voltage converter has its input connected to the output of a first reference divider in the variable reference divider (.div.M) and its output connected to a control input (varactor diode) of the voltage controlled oscillator. The voltage converter clamps the divider reference signal from the first reference divider and provides a negative voltage level output to bias the varactor diode of the voltage controlled oscillator. Thus, the tuning range of the frequency synthesizer is increased.

Abstract translation: 在包括参考振荡器，可变参考分频器（DIVIDED M），采样和保持相位检测器，环路滤波器，压控振荡器和可变分频器（DIVIDED N）的频率合成器锁相环中，用于控制 公开了对压控振荡器的控制输入的电压。 在优选实施例中，电压转换器的输入连接到可变参考分压器（DIVIDED M）中的第一参考分压器的输出，其输出连接到压控振荡器的控制输入（变容二极管）。 电压转换器钳位来自第一参考分压器的分频器参考信号，并提供负电压电平输出以偏压压控振荡器的变容二极管。 因此，频率合成器的调谐范围增加。

公开(公告)号：US5265267A

公开(公告)日：1993-11-23

申请号：US751845

申请日：1991-08-29

Applicant: William J. Martin ,  David Penunuri ,  Jose I. Suarez ,  Frederick Y. Cho

Inventor： William J. Martin ,  David Penunuri ,  Jose I. Suarez ,  Frederick Y. Cho

IPC: H03H9/64 ,  H03D7/14 ,  H03H9/00 ,  H03H9/02 ,  H03H9/05 ,  H04B1/26 ,  H03H9/145

CPC classification number: H04B1/26 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/165 ,  H03H9/0038 ,  H03H9/0542 ,  H03D2200/0007

Abstract: In a radio transceiver (100), an IF stage (110) is formed on a single substrate. A balanced or image rejection mixer (204) having two pairs of inputs and a pair of outputs is integrated on an IC substrate (202). Disposed on the IC substrate are SAW transformers (210, 212 and 214) which provide a desired phase transformation. The SAW transformers comprise piezoelectric layers (228) and metallization layers (230) which are suitably patterned to provide the desired phase transformation and frequency selectivity.

Abstract translation: 在无线电收发器（100）中，IF单元（110）形成在单个基板上。 具有两对输入和一对输出的平衡或镜像抑制混频器（204）集成在IC基板（202）上。 设置在IC基板上的是提供期望的相变的SAW变压器（210,212和214）。 SAW变压器包括压电层（228）和金属化层（230），其被适当地构图以提供期望的相变和频率选择性。

公开(公告)号：US5175884A

公开(公告)日：1992-12-29

申请号：US531668

申请日：1990-06-01

Applicant: Jose I. Suarez

Inventor： Jose I. Suarez

IPC: H03B1/00 ,  H03B1/04 ,  H03B5/12 ,  H03L7/099 ,  H03L7/183

CPC classification number: H03L7/183 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03L7/099 ,  H03B2200/004 ,  H03B2200/0062 ,  H03B2200/0088 ,  H03B2201/0208 ,  H03B2202/027 ,  H03L2207/06

Abstract: An apparatus (200) and method for adjusting the bias current of the oscillating device (320) in a VCO (202) in response to changes in the tuning voltage of the VCO to achieve reduced sideband noise.

Abstract translation: 一种用于响应于VCO的调谐电压的变化来调节VCO（202）中的振荡器件（320）的偏置电流以实现降低的边带噪声的装置（200）和方法。

公开(公告)号：US5087897A

公开(公告)日：1992-02-11

申请号：US663533

申请日：1991-03-04

Applicant: Jose I. Suarez

Inventor： Jose I. Suarez

IPC: H03B1/00 ,  H03B5/12

CPC classification number: H03B5/1231 ,  H03B5/1203 ,  H03B5/1256 ,  H03B2201/0216

Abstract: An oscillator circuit is tunable by a tuning circuit which includes a spiral inductor disposed on a ferrite substrate. The oscillator circuit is tuned or modulated by varying a current through the spiral inductor.

Abstract translation: 振荡电路可由调谐电路调节，该调谐电路包括设置在铁氧体衬底上的螺旋电感器。 通过改变通过螺旋电感器的电流来调谐或调制振荡器电路。

公开(公告)号：US4631496A

公开(公告)日：1986-12-23

申请号：US808905

申请日：1985-12-13

Applicant: Jaime A. Borras ,  Jose I. Suarez

Inventor： Jaime A. Borras ,  Jose I. Suarez

IPC: H03C3/09 ,  H03C3/22 ,  H03D13/00 ,  H03J5/02 ,  H03K23/66 ,  H03L7/08 ,  H03L7/193 ,  H03L7/199 ,  H04B1/40 ,  H03L7/18

CPC classification number: H03C3/0966 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/0958 ,  H03C3/227 ,  H03D13/005 ,  H03J5/0281 ,  H03K23/66 ,  H03K23/667 ,  H03L7/0802 ,  H03L7/193 ,  H03L7/199 ,  H04B1/405

Abstract: A frequency synthesized transceiver capable of tuning to a plurality of communication channels is disclosed. The transceiver includes a receiver and a transmitter section which are coupled to the synthesizer which generates the appropriate injection signals to achieve tuning. A battery saving circuit generates a battery saving signal having a predetermined duty cycle and period and is responsive to the phase detector in the synthesizer to disrupt power to the synthesizer while maintaining precise tuning. The battery saver circuit is also responsive to the transceiver. In a normal receive operation, a battery saving circuit synchronizes its battery saving signal with the hold condition of the phase detector to disrupt power to selected modules in the synthesizer without altering the injection frequency of the receiver. In a standby mode, power is disrupted to all modules in the receiver, the selected modules in the phase locked loop and the voltage controlled oscillator. During a transmit mode all battery saving is terminated.

Abstract translation: 公开了能够调谐到多个通信信道的频率合成收发器。 收发器包括接收器和发射器部分，其耦合到合成器，其产生适当的注入信号以实现调谐。 电池节省电路产生具有预定占空比和周期的电池节省信号，并且响应于合成器中的相位检测器来中断合成器的电源，同时保持精确的调谐。 电池保护电路也对收发器做出响应。 在正常接收操作中，电池节省电路使其电池节省信号与相位检测器的保持状态同步，以将合成器中的选定模块的功率中断，而不改变接收机的注入频率。 在待机模式下，接收机中的所有模块，锁相环中的选定模块和压控振荡器的电源中断。 在发送模式期间，所有电池节电终止。

公开(公告)号：US4490688A

公开(公告)日：1984-12-25

申请号：US251570

申请日：1981-04-06

Applicant: Jaime A. Borras ,  Jose I. Suarez ,  Alan M. Victor

Inventor： Jaime A. Borras ,  Jose I. Suarez ,  Alan M. Victor

IPC: H03C3/09 ,  H03C3/22 ,  H03D13/00 ,  H03J5/02 ,  H03K23/66 ,  H03L7/08 ,  H03L7/193 ,  H03L7/199 ,  H04B1/40 ,  H03L7/12

CPC classification number: H03K21/38 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/0958 ,  H03C3/0966 ,  H03C3/227 ,  H03D13/005 ,  H03J5/0281 ,  H03K23/667 ,  H03L7/0802 ,  H03L7/193 ,  H03L7/199 ,  H04B1/405

Abstract: A sample and hold phase detector for a phase locked loop includes a digital detector for detecting the frequency and phase difference between the reference signal and the voltage controlled oscillator (VCO) signal. In a first mode of operation, the digital detector generates a first signal relating the difference in frequency and in a second mode of operation generates a second signal relating the difference in phase. A capacitor stores the first or second signal depending on the operational mode of the digital detector. The capacitor is selectively discharged in response to a discharge signal produced by the digital detector when either the VCO frequency is higher than the reference frequency or following each detection of a phase difference. A first amplifier is used to bypass a portion of the loop filter to effect rapid changes in VCO frequency in the first mode while a second amplifier couples the control voltage to the VCO via the loop filter to maintain proper VCO frequency in the second mode.

Abstract translation: 用于锁相环的采样和保持相位检测器包括用于检测参考信号和压控振荡器（VCO）信号之间的频率和相位差的数字检测器。 在第一操作模式中，数字检测器产生与频率差有关的第一信号，而在第二操作模式中产生与相位差有关的第二信号。 电容器根据数字检测器的工作模式存储第一或第二信号。 当VCO频率高于参考频率或每次检测相位差之后，电容器响应于由数字检测器产生的放电信号而被选择性地放电。 第一放大器用于绕过环路滤波器的一部分以在第一模式中实现VCO频率的快速变化，而第二放大器经由环路滤波器将控制电压耦合到VCO以在第二模式中维持适当的VCO频率。