利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

28 条记录 (耗时 0.02 秒)

    Dicing process for GAAS/INP and other semiconductor materials
    11.
    发明授权
    Dicing process for GAAS/INP and other semiconductor materials 失效
    GAAS / INP等半导体材料的切割工艺

    公开(公告)号：US06828217B2

    公开(公告)日：2004-12-07

    申请号：US10284707

    申请日：2002-10-31

    申请人： Hung C. Nguyen ,  I-Ching T. Yang

    发明人： Hung C. Nguyen ,  I-Ching T. Yang

    IPC分类号： H01L21301

    CPC分类号： H01L21/6835 ,  H01L21/0273 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

    摘要： A semiconductor wafer and a method for fabricating a semiconductor wafer having improved dicing lanes are provided. The dicing lanes include grooves formed by photolithography and etching processes. The wafer also includes a plating layer on a back side of the wafer to facilitate bonding of individual circuit chips to a suitable substrate and to effect efficient heat transfer between the chip and the substrate. Photolithography and etching processes are employed to etch horizontal and vertical lanes in the plating layer to facilitate breaking of the individual chips from the wafer. The horizontal and vertical lanes etched in the plating layer are coincident to the grooves etched in the substrate. The wafer can then be broken into individual circuit chips by applying stress to the back of the wafer, such that the wafer cleanly breaks along the horizontal and vertical dicing lanes and the etched grooves.

    摘要翻译： 提供半导体晶片和制造具有改进的切割通道的半导体晶片的方法。 切割车道包括通过光刻和蚀刻工艺形成的凹槽。 晶片还包括在晶片的背面上的镀层，以便于将各个电路芯片接合到合适的衬底并且实现芯片和衬底之间的有效的热传递。 采用光刻和蚀刻工艺来蚀刻镀层中的水平和垂直通道以便于从晶片破碎各个芯片。 在镀层中蚀刻的水平和垂直通道与在衬底中蚀刻的槽重合。 然后通过向晶片的背面施加应力，将晶片分解为单独的电路芯片，使得晶片沿着水平和垂直切割通道和蚀刻的沟槽干净地断裂。

    Adhesive-free edge butting for printhead elements
    12.
    发明授权
    Adhesive-free edge butting for printhead elements 失效
    用于打印头元件的无粘合剂边缘对接

    公开(公告)号：US5572244A

    公开(公告)日：1996-11-05

    申请号：US280973

    申请日：1994-07-27

    申请人： Donald J. Drake ,  Hung C. Nguyen

    发明人： Donald J. Drake ,  Hung C. Nguyen

    IPC分类号： B41J2/155 ,  B41J2/16 ,  G01D15/18 ,  B41J2/14

    CPC分类号： B41J2/1635 ,  B41J2/155 ,  B41J2/1604 ,  B41J2/1623 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2202/20 ,  B41J2202/21 ,  Y10T29/49083 ,  Y10T29/49401

    摘要： A large array or pagewidth printhead fabricated from printhead elements or subunits having adhesive-free butting edges. Each of the printhead elements includes a heater element and a channel element bonded together by an adhesive such as an epoxy. A space or adhesive-receiving aperture is formed between the channel element and the heater element before mating so that any adhesive forced from between the channel element and heater element by the pressure of mating does not flow onto the butting surfaces, but instead overflows into the space thereby maintaining an adhesive free butting edge. The channel element includes an etch trough which forms the space. The printhead elements are butted together to form a large array printhead. The absence of adhesive on the butting edges improves manufacturability of the large array printhead.

    摘要翻译： 由打印头元件或具有无粘合剂对接边缘的子单元制造的大阵列或页宽打印头。 每个打印头元件包括加热器元件和通过诸如环氧树脂的粘合剂粘合在一起的通道元件。 在配合之前，在通道元件和加热器元件之间形成空间或粘合剂接收孔，使得通过配合压力从通道元件和加热器元件之间强制的任何粘合剂不会流到对接表面上，而是溢流到 空间，从而保持无粘合剂的对接边缘。 通道元件包括形成空间的蚀刻槽。 打印头元件对接在一起以形成大阵列打印头。 对接边缘上没有粘合剂提高了大阵列打印头的可制造性。

    Viterbi detector having adjustable detection thresholds for PRML class IV sampling data detection
    13.
    发明授权
    Viterbi detector having adjustable detection thresholds for PRML class IV sampling data detection 失效
    Viterbi检测器具有PRML IV类采样数据检测的可调检测阈值

    公开(公告)号：US5341387A

    公开(公告)日：1994-08-23

    申请号：US936759

    申请日：1992-08-27

    申请人： Hung C. Nguyen

    发明人： Hung C. Nguyen

    IPC分类号： G11B20/10 ,  G11B20/12 ,  H04L25/49 ,  H04L1/00 ,  G06J1/00

    CPC分类号： H04L25/4908 ,  G11B20/10 ,  G11B20/1258

    摘要： A Viterbi detector for a PR4,ML data channel includes a data sample input for receiving digital data samples from a source. Digital data samples are taken of data which has been coded in a predetermined data code format and which has been passed through a data degrading channel. A delay circuit delays the digital data samples received at the data sample input. A delay selector controls an output of the delay circuit in accordance with a feedback control bit value. An adder circuit combines data samples from the data sample input with delayed samples from the delay circuit to produce a sum. A threshold input receives programmable positive and negative data threshold values. A threshold selector puts out either the positive or the negative threshold values in accordance with a sign bit control value. A comparator compares the sum with a selected threshold value and puts out a logical value based upon comparison thereof. It includes Viterbi decision state logic for determining the sign bit control value, the feedback control bit value, and two raw data bits for each incoming data sample. A memory path circuit decodes a sequence of consecutive values of the raw data bits in accordance with a predetermined maximum likelihood trellis decode logic table related to the predetermined data code format and puts out a sequence of detected code bits.

    摘要翻译： 用于PR4，ML数据通道的维特比检测器包括用于从源接收数字数据采样的数据采样输入。 数据数据样本取已经以预定数据码格式编码并已经通过数据降级信道的数据。 延迟电路延迟在数据采样输入端接收的数字数据样本。 延迟选择器根据反馈控制位值控制延迟电路的输出。 加法器电路将来自数据采样输入的数据采样与来自延迟电路的延迟采样相结合，产生和。 阈值输入接收可编程的正和负数据阈值。 阈值选择器根据符号位控制值输出正阈值或负阈值。 比较器将和与选择的阈值进行比较，并根据其比较输出逻辑值。 它包括用于确定每个输入数据样本的符号位控制值，反馈控制位值和两个原始数据位的维特比判决状态逻辑。 存储器路径电路根据与预定数据代码格式相关的预定最大似然网格解码逻辑表来解码原始数据位的连续值序列，并且输出检测到的代码位序列。

    Wide biphase digital servo information detection, and estimation for disk drive using servo Viterbi detector
    15.
    发明授权
    Wide biphase digital servo information detection, and estimation for disk drive using servo Viterbi detector 失效
    宽双相数字伺服信息检测，以及使用伺服维特比检测器的磁盘驱动器估计

    公开(公告)号：US5661760A

    公开(公告)日：1997-08-26

    申请号：US686998

    申请日：1996-07-24

    申请人： Ara Patapoutian ,  Matthew P. Vea ,  Hung C. Nguyen

    发明人： Ara Patapoutian ,  Matthew P. Vea ,  Hung C. Nguyen

    IPC分类号： G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/18 ,  G11B21/10 ,  G11B27/30 ,  H03M13/23 ,  H04L25/49 ,  H04D27/06 ,  H03D1/00

    CPC分类号： H04L25/4904 ,  G11B20/10009 ,  G11B27/3027 ,  G11B5/5526 ,  G11B5/59688 ,  G11B2220/20 ,  G11B5/5965

    摘要： A synchronous sampling data detection channel includes a data transducer head positioned by a servo-controlled actuator over a recording track of a rotating data storage disk, a preamplifier for receiving electrical analog signals magnetically induced by the data transducer head from flux transitions present in at least the servo information field, a digital sampler for synchronously sampling the electrical analog signals to produce digital samples, and a Viterbi detector coupled to receive digital samples from the synchronous sampling data detection channel for decoding 1/4 T coded wide biphase servo information patterns patterns as maximum likelihood servo data sequences, wherein the wide biphase magnet patterns are arranged e.g. as ++-- magnet patterns for a binary zero information value and --++ magnet patterns for a binary one information value.

    摘要翻译： 同步采样数据检测通道包括由伺服控制致动器定位在旋转数据存储盘的记录轨道上的数据传感器头，前置放大器，用于接收至少由数据传感器头磁场感应的电流模拟信号 伺服信息字段，用于同步采样电气模拟信号以产生数字样本的数字采样器，以及耦合以从同步采样数据检测通道接收数字采样的维特比检测器，用于将1/4 T编码的宽双相伺服信息模式图案解码为 最大似然伺服数据序列，其中布置宽双相磁体图案例如 作为二进制零信息值的++ - 磁体模式和二进制一个信息值的++磁体模式。

    Cross-checking for on-the-fly Reed Solomon error correction code
    18.
    发明授权
    Cross-checking for on-the-fly Reed Solomon error correction code 失效
    交叉检查即时Reed Solomon纠错码

    公开(公告)号：US5422895A

    公开(公告)日：1995-06-06

    申请号：US820283

    申请日：1992-01-09

    申请人： Hung C. Nguyen ,  Thomas D. Howell ,  Bruce R. Peterson

    发明人： Hung C. Nguyen ,  Thomas D. Howell ,  Bruce R. Peterson

    IPC分类号： H03M13/01 ,  H03M13/15 ,  G06F11/10 ,  H03M13/00

    CPC分类号： H03M13/01 ,  H03M13/151

    摘要： An improved cross-checking circuit is provided for use within a Reed-Solomon error correction and cross checking apparatus for performing error correction and cross checking upon a data block within an incoming stream of substantially contiguous data blocks flowing from a source to a destination. The circuit is based upon a distinguished primitive element, alpha.sup.1 (2B (Hex))=x.sup.5 +x.sup.3 +x+1, of a Galois field whose elements are represented by residue classes of binary polynomials modulo p(x)=x.sup.8 +x.sup.4 +x.sup.3 +x.sup.2 +1. The apparatus includes a microcontroller for supervising the flow of the data blocks and for making calculations related to error corrections, and a Galois field syndrome generator and remainder recovery circuit is connected to receive the incoming stream and recover therefrom plural error correction remainder bytes for each block and selectively to hold said bytes in a syndrome latch, the remainder bytes being related to syndrome bytes appended to the data block. The generator and remainder recovery circuit includes the Reed-Solomon cross-checking circuit for recovering cross-checking remainder information related to cross check syndrome information in accordance with the polynomial GXC(x)=x.sup.2 +alpha.sup. 134 x+alpha.sup.1.

    摘要翻译： 提供了一种改进的交叉检查电路，用于在Reed-Solomon纠错和交叉检查装置中使用，用于对从源到目的地流动的基本相邻的数据块的输入流中的数据块执行纠错和交叉检查。 该电路基于伽罗瓦域的识别原始元素α1（2B（Hex））= x5 + x3 + x + 1，其元素由模p（x）= x8 + x4 +的二进制多项式的残差类别表示， x3 + x2 + 1。 该装置包括用于监视数据块的流动并进行与误差校正相关的计算的微控制器，并且伽罗瓦域校正子发生器和余数恢复电路被连接以接收输入流并从其中恢复每个块的多个纠错余数字节 并且选择性地将所述字节保持在校正子锁存器中，其余字节与附加到数据块的校验码字节相关。 发生器和余数恢复电路包括Reed-Solomon交叉检查电路，用于根据多项式GXC（x）= x2 +α1×134x +α1来恢复与交叉检验校正子信息相关的交叉检验余数信息。

    1,2-dihydro-4-methyl-1-oxo-5H-pyrido(4,3-b)indoles and the process for their synthesis
    19.
    发明授权
    1,2-dihydro-4-methyl-1-oxo-5H-pyrido(4,3-b)indoles and the process for their synthesis 失效
    1,2-二氢-4-甲基-1-氧代-5H-吡啶并（4,3-b）吲哚及其合成方法

    公开(公告)号：US4870180A

    公开(公告)日：1989-09-26

    申请号：US26574

    申请日：1987-03-17

    申请人： Emile R. Bisagni ,  Hung C. Nguyen ,  Paul M. de Cointet

    发明人： Emile R. Bisagni ,  Hung C. Nguyen ,  Paul M. de Cointet

    IPC分类号： C07D471/04

    CPC分类号： C07D471/04

    摘要： The present invention relates to new compounds which are the 1,2-dihydro-4-methyl-1-oxo-5H-pyrido(4,3-b)indoles with the formula (I): ##STR1## in which R represents hydrogen or an alkoxy or aryl carbonyloxy group. These compounds are intermediates of synthesis in the preparation of compounds which can be used in the pharamaceutical industry. The invention is also concerned with their synthesis.

    摘要翻译： 本发明涉及新化合物，其是具有式（I）的1,2-二氢-4-甲基-1-氧代-5H-吡啶并（4,3-b）吲哚：其中 R表示氢或烷氧基或芳基羰氧基。 这些化合物是可用于制药行业的化合物的制备中的合成中间体。 本发明也涉及它们的合成。