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公开(公告)号:US20150212817A1
公开(公告)日:2015-07-30
申请号:US14608252
申请日:2015-01-29
发明人: Shlomo Raikin , Noam Bloch , Richard Graham , Ofer Hayut , Michael Kagan , Liran Liss
CPC分类号: G06F11/073 , G06F9/30043 , G06F11/0745 , G06F11/0757 , G06F11/2236 , G06F11/3668
摘要: A method for network access of remote memory directly from a local instruction stream using conventional loads and stores. In cases where network IO access (a network phase) cannot overlap a compute phase, a direct network access from the instruction stream greatly decreases latency in CPU processing. The network is treated as yet another memory that can be directly read from, or written to, by the CPU. Network access can be done directly from the instruction stream using regular loads and stores. Example scenarios where synchronous network access can be beneficial are SHMEM (symmetric hierarchical memory access) usages (where the program directly reads/writes remote memory), and scenarios where part of system memory (for example DDR) can reside over a network and made accessible by demand to different CPUs.
摘要翻译: 一种使用常规负载和存储直接从本地指令流网络访问远程存储器的方法。 在网络IO访问(网络阶段)不能与计算阶段重叠的情况下,来自指令流的直接网络访问大大降低了CPU处理中的延迟。 该网络被视为可以直接从CPU读取或写入的另一个存储器。 网络访问可以直接从指令流使用常规的负载和存储。 同步网络访问可能有益的示例场景是SHMEM(对称分层存储器访问)用途(程序直接读/写远程内存的位置)以及系统内存(例如DDR)的一部分可以驻留在网络上并使其可访问的情况 通过需求到不同的CPU。
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公开(公告)号:US20240012753A1
公开(公告)日:2024-01-11
申请号:US17858104
申请日:2022-07-06
发明人: Daniel Marcovitch , Gil Bloch , Richard Graham , Yossef Itigin , Ortal Ben Moshe , Roman Nudelman
IPC分类号: G06F12/06 , G06F12/0831 , G06F15/173 , G06F13/40
CPC分类号: G06F12/0653 , G06F12/0835 , G06F15/17331 , G06F13/4027
摘要: A network device includes a first interface, a second interface, and circuitry. The first interface is configured to communicate at least with a memory. The second interface is configured to communicate over a network with a peer network device. The circuitry is configured to receive a request to transfer data over the network between the memory and the peer network device in accordance with (i) a pattern of offsets to be accessed in the memory and (ii) a memory key representing a memory space to be accessed using the pattern, and to transfer the data in accordance with the request.
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公开(公告)号:US09996491B2
公开(公告)日:2018-06-12
申请号:US15181436
申请日:2016-06-14
发明人: Diego Crupnicoff , Todd Wilde , Richard Graham , Michael Kagan
CPC分类号: G06F13/4022 , G06F12/0835 , G06F13/28 , G06F13/36 , G06F13/4068 , G06F13/4282 , G11C7/1072
摘要: A network interface device for a host computer includes a network interface, configured to transmit and receive data packets to and from a network. Packet processing logic transfers data to and from the data packets transmitted and received via the network interface by direct memory access (DMA) from and to a system memory of the host computer. A memory controller includes a first memory interface configured to be connected to the system memory and a second memory interface, configured to be connected to a host complex of the host computer. Switching logic alternately couples the first memory interface to the packet processing logic in a DMA configuration and to the second memory interface in a pass-through configuration.
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公开(公告)号:US20180052803A1
公开(公告)日:2018-02-22
申请号:US15681390
申请日:2017-08-20
发明人: Richard Graham , Ana Gainaru
IPC分类号: G06F15/173 , H04L12/931
CPC分类号: G06F15/17318 , G06F13/12 , H04L49/355
摘要: An all-to-all communication operation which is carried out in a fabric of networked entities by defining in each of the entities a plurality of memory regions of contiguous memory addresses holding messages therein, and exchanging the messages repeatedly with all the other entities. Relatively small messages are copied using a CPU and larger messages are transmitted using scatter/gather facilities.
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公开(公告)号:US09678818B2
公开(公告)日:2017-06-13
申请号:US14608252
申请日:2015-01-29
发明人: Shlomo Raikin , Noam Bloch , Richard Graham , Ofer Hayut , Michael Kagan , Liran Liss
CPC分类号: G06F11/073 , G06F9/30043 , G06F11/0745 , G06F11/0757 , G06F11/2236 , G06F11/3668
摘要: A method for network access of remote memory directly from a local instruction stream using conventional loads and stores. In cases where network IO access (a network phase) cannot overlap a compute phase, a direct network access from the instruction stream greatly decreases latency in CPU processing. The network is treated as yet another memory that can be directly read from, or written to, by the CPU. Network access can be done directly from the instruction stream using regular loads and stores. Example scenarios where synchronous network access can be beneficial are SHMEM (symmetric hierarchical memory access) usages (where the program directly reads/writes remote memory), and scenarios where part of system memory (for example DDR) can reside over a network and made accessible by demand to different CPUs.
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16.
公开(公告)号:US20160283422A1
公开(公告)日:2016-09-29
申请号:US15181436
申请日:2016-06-14
发明人: Diego Crupnicoff , Todd Wilde , Richard Graham , Michael Kagan
CPC分类号: G06F13/4022 , G06F12/0835 , G06F13/28 , G06F13/36 , G06F13/4068 , G06F13/4282 , G11C7/1072
摘要: A network interface device for a host computer includes a network interface, configured to transmit and receive data packets to and from a network. Packet processing logic transfers data to and from the data packets transmitted and received via the network interface by direct memory access (DMA) from and to a system memory of the host computer. A memory controller includes a first memory interface configured to be connected to the system memory and a second memory interface, configured to be connected to a host complex of the host computer. Switching logic alternately couples the first memory interface to the packet processing logic in a DMA configuration and to the second memory interface in a pass-through configuration.
摘要翻译: 用于主计算机的网络接口设备包括网络接口,被配置为向网络发送数据分组和从网络接收数据分组。 分组处理逻辑通过来自主计算机的系统存储器的直接存储器访问(DMA)经由网络接口传送和接收的数据分组传送数据。 存储器控制器包括被配置为连接到系统存储器的第一存储器接口和被配置为连接到主计算机的主机复合体的第二存储器接口。 开关逻辑将第一存储器接口交替地耦合到DMA配置中的分组处理逻辑,并以直通配置耦合到第二存储器接口。
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公开(公告)号:US20160072906A1
公开(公告)日:2016-03-10
申请号:US14834443
申请日:2015-08-25
发明人: Shahaf Shuler , Noam Bloch , Ofer Hayut , Richard Graham , Ariel Shahar
CPC分类号: H04L67/26 , H04L49/9068 , H04L67/10 , H04L67/1093 , H04L67/1097 , H04L69/06
摘要: A method for communication includes posting, by a software process, a set of buffers in a memory of a host processor and creating in the memory a list of labels associated respectively with the buffers. The software process pushes a first part of the list to a network interface controller (NIC), while retaining a second part of the list in the memory under control of the software process. Upon receiving a message containing a label, sent over a network, the NIC compares the label to the labels in the first part of the list and, upon finding a match to the label, writes data conveyed by the message to a buffer in the memory. Upon a failure to find the match in the first part of the list, the NIC passes the message from the NIC to the software process for handling using the second part of the list.
摘要翻译: 一种用于通信的方法包括通过软件处理将主机处理器的存储器中的一组缓冲器发布,并在存储器中创建分别与缓冲器相关联的标签的列表。 软件进程将列表的第一部分推送到网络接口控制器(NIC),同时在软件进程控制下将列表的第二部分保留在内存中。 在接收到包含通过网络发送的标签的消息时,NIC将标签与列表的第一部分中的标签进行比较,并且在找到与标签的匹配时,将消息传送的数据写入存储器中的缓冲器 。 如果在列表的第一部分找不到匹配项,则NIC将该消息从NIC传递到软件进程以使用列表的第二部分进行处理。
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公开(公告)号:US20240211426A1
公开(公告)日:2024-06-27
申请号:US18598382
申请日:2024-03-07
发明人: Daniel Marcovitch , Dotan David Levi , Eyal Srebro , Eliel Peretz , Roee Moyal , Richard Graham , Gil Bloch , Sean Pieper
摘要: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
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公开(公告)号:US20240095106A1
公开(公告)日:2024-03-21
申请号:US18105846
申请日:2023-02-05
发明人: Richard Graham
IPC分类号: G06F9/54
CPC分类号: G06F9/546
摘要: A method for collective communications includes invoking a collective operation over a group of computing processes in which the processes concurrently transmit and receive data to and from other processes in the group via a communication medium. Messages are composed for transmission by source processes including metadata indicating how the data to be transmitted by the source processes in the collective operation are to be handled by destination processes that are to receive the data and also including in at least some of the messages the data to be transmitted by one or more of the source processes to one or more of the destination processes. The composed messages are transmitted concurrently from the source processes to the destination processes in the group over the communication medium. The data are processed by the destination processes in response to the metadata included in the messages received by the destination processes.
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公开(公告)号:US11934332B2
公开(公告)日:2024-03-19
申请号:US17590339
申请日:2022-02-01
发明人: Daniel Marcovitch , Dotan David Levi , Eyal Srebro , Eliel Peretz , Roee Moyal , Richard Graham , Gil Bloch , Sean Pieper
摘要: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
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