RANDOM NUMBER GENERATOR
    11.
    发明申请
    RANDOM NUMBER GENERATOR 审中-公开
    随机数发电机

    公开(公告)号:US20080243978A1

    公开(公告)日:2008-10-02

    申请号:US12050079

    申请日:2008-03-17

    IPC分类号: G06F7/58

    CPC分类号: G06F7/588

    摘要: A random number generator includes an amplifier to amplify a difference between a noise signal and a reference signal to generate an amplified signal, a plurality of binarization circuits configured to binarize the amplified signal by using different inherent threshold values to obtain a plurality of binarized signals, and an exclusive OR circuit to perform an exclusive OR operation on the a plurality of binarized signals to generate random number sequence.

    摘要翻译: 随机数发生器包括:放大器,用于放大噪声信号和参考信号之间的差以产生放大信号;多个二值化电路,被配置为通过使用不同的固有阈值二值化放大的信号,以获得多个二值化信号; 以及异或电路,对多个二值化信号进行异或运算,生成随机数序列。

    Random number generating device
    12.
    发明授权
    Random number generating device 有权
    随机数生成装置

    公开(公告)号:US08307022B2

    公开(公告)日:2012-11-06

    申请号:US12130567

    申请日:2008-05-30

    IPC分类号: G06F1/02

    CPC分类号: G06F7/588 H03K3/84

    摘要: A random number generating device includes: a pulse voltage generator configured to generate a pulse voltage having an amplitude of 26 mV or more; a random noise generating element including source and drain regions formed at a distance from each other on a semiconductor substrate, a tunnel insulating film formed on a portion of the semiconductor substrate located between the source region and the drain region, and a gate electrode formed above the tunnel insulating film and to which the pulse voltage is applied, the random noise generating element configured to generate a random noise contained in a current flowing between the source region and the drain region; and a random number generating unit configured to generate a random number signal based on the random noise.

    摘要翻译: 随机数生成装置包括:脉冲电压发生器,被配置为产生具有26mV或更大幅度的脉冲电压; 包括形成在半导体衬底上彼此间隔一定距离的源极和漏极区域的随机噪声产生元件,形成在位于源极区域和漏极区域之间的半导体衬底的一部分上的隧道绝缘膜以及形成在栅极电极上的栅电极 隧道绝缘膜,并且施加脉冲电压,所述随机噪声产生元件被配置为产生包含在源极区域和漏极区域之间的电流中的随机噪声; 以及随机数生成单元,被配置为基于随机噪声生成随机数信号。

    Programmable logic switch
    13.
    发明授权
    Programmable logic switch 有权
    可编程逻辑开关

    公开(公告)号:US08432186B1

    公开(公告)日:2013-04-30

    申请号:US13484639

    申请日:2012-05-31

    IPC分类号: H03K19/173

    摘要: One embodiment provides a programmable logic switch in which a first nonvolatile memory and a second nonvolatile memory are formed in the same well, and in which to change the first nonvolatile memory from an erased state to a written state and leave the second nonvolatile memory being in the erased state, a first write voltage is applied to a first line connected with gate electrodes of the first and second nonvolatile memories, a second write voltage is applied to a second line connected to a source in the first nonvolatile memory, and a third write voltage lower than the second write voltage is applied to a fourth line connected to a source of the second nonvolatile memory.

    摘要翻译: 一个实施例提供一种可编程逻辑开关,其中在同一个阱中形成第一非易失性存储器和第二非易失性存储器,并且其中将第一非易失性存储器从擦除状态改变为写入状态,并使第二非易失性存储器处于 擦除状态时,将第一写入电压施加到与第一和第二非易失性存储器的栅电极连接的第一线,第二写入电压被施加到连接到第一非易失性存储器中的源极的第二线,并且第三写入 低于第二写入电压的电压被施加到连接到第二非易失性存储器的源极的第四线路。

    Configuration memory
    14.
    发明授权
    Configuration memory 有权
    配置内存

    公开(公告)号:US08842475B2

    公开(公告)日:2014-09-23

    申请号:US13603666

    申请日:2012-09-05

    IPC分类号: G11C11/34

    CPC分类号: G11C16/06 G11C7/06 G11C16/26

    摘要: According to one embodiment, a configuration memory includes first and second data lines, a first memory string which comprises at least first and second nonvolatile memory transistors which are connected in series between a common node and the first data line, a second memory string which comprises at least third and fourth nonvolatile memory transistors which are connected in series between the common node and the second data line, and a flip-flop circuit which comprises a first data holding node connected to the common node and a second data holding node connected to a configuration data output node.

    摘要翻译: 根据一个实施例,配置存储器包括第一和第二数据线,第一存储器串,其包括串联连接在公共节点和第一数据线之间的至少第一和第二非易失性存储器晶体管,第二存储器串包括 在公共节点和第二数据线之间串联连接的至少第三和第四非易失性存储器晶体管,以及包括连接到公共节点的第一数据保持节点和连接到公共节点的第二数据保持节点的触发器电路 配置数据输出节点。

    RANDOM NUMBER GENERATING DEVICE
    15.
    发明申请
    RANDOM NUMBER GENERATING DEVICE 有权
    随机数生成装置

    公开(公告)号:US20090327379A1

    公开(公告)日:2009-12-31

    申请号:US12130567

    申请日:2008-05-30

    IPC分类号: G06F7/58

    CPC分类号: G06F7/588 H03K3/84

    摘要: A random number generating device includes: a pulse voltage generator configured to generate a pulse voltage having an amplitude of 26 mV or more; a random noise generating element including source and drain regions formed at a distance from each other on a semiconductor substrate, a tunnel insulating film formed on a portion of the semiconductor substrate located between the source region and the drain region, and a gate electrode formed above the tunnel insulating film and to which the pulse voltage is applied, the random noise generating element configured to generate a random noise contained in a current flowing between the source region and the drain region; and a random number generating unit configured to generate a random number signal based on the random noise.

    摘要翻译: 随机数生成装置包括:脉冲电压发生器,被配置为产生具有26mV或更大幅度的脉冲电压; 包括形成在半导体衬底上彼此间隔一定距离的源极和漏极区域的随机噪声产生元件,形成在位于源极区域和漏极区域之间的半导体衬底的一部分上的隧道绝缘膜以及形成在栅极电极上的栅电极 隧道绝缘膜,并且施加脉冲电压,所述随机噪声产生元件被配置为产生包含在源极区域和漏极区域之间的电流中的随机噪声; 以及随机数生成单元,被配置为基于随机噪声生成随机数信号。

    Circuit having programmable match determination function, and LUT circuit, MUX circuit and FPGA device with such function and method of data writing
    16.
    发明授权
    Circuit having programmable match determination function, and LUT circuit, MUX circuit and FPGA device with such function and method of data writing 有权
    具有可编程匹配确定功能的电路,以及具有数据写入功能和方法的LUT电路,MUX电路和FPGA器件

    公开(公告)号:US08908408B2

    公开(公告)日:2014-12-09

    申请号:US13613701

    申请日:2012-09-13

    IPC分类号: G11C15/00

    摘要: A circuit according to embodiments includes: a plurality of bit-string comparators each of which includes a plurality of single-bit comparators each of which includes first and second input terminals, first and second match-determination terminals, and a memory storing data and inverted data in a pair, the first input terminal being connected to a respective search line, the second input terminal being connected to an inverted search line being paired with the respective search line, and a matching line connecting the first and second match-determination terminals of the single-bit comparators; a pre-charge transistor of which source is connected to a supply voltage line; a common matching line connected to a drain of the pre-charge transistor and the matching lines of the bit-string comparators; and an output inverter of which input is connected to the common matching line.

    摘要翻译: 根据实施例的电路包括:多个比特串比较器,每个比特串包括多个单比特比较器,每个单比特比较器包括第一和第二输入端,第一和第二匹配确定终端,以及存储数据并反转的存储器 成对的数据,第一输入端子连接到相应的搜索线,第二输入端子连接到与相应搜索线配对的反向搜索线,以及匹配线,连接第一和第二匹配确定端子 单比特比较器; 其源极连接到电源电压线的预充电晶体管; 连接到预充电晶体管的漏极和位串比较器的匹配线的公共匹配线; 以及输入反相器,其输入连接到公共匹配线。

    Automatic search and transfer apparatus and automatic search and transfer system
    17.
    发明授权
    Automatic search and transfer apparatus and automatic search and transfer system 有权
    自动搜索和传输设备和自动搜索和传输系统

    公开(公告)号:US08601012B2

    公开(公告)日:2013-12-03

    申请号:US12737933

    申请日:2008-09-11

    IPC分类号: G06F17/30

    CPC分类号: G06F17/30029 G06F17/30038

    摘要: An automatic search and transfer apparatus that automatically searches for and transfers data one or more computers connected via a network, that includes a keyword input section that inputs at least one keyword, a search section that searches for data including the at least one keyword and acquires attribute data of concerned data from the one or more computers connected via the network, a reporting section that reports information relating to the concerned data to a user, a reception section that receives the concerned data from one or more computers, and a data storage section that stores the data. The reporting section reports acquisition of the attribute data to the user when the attribute data is acquired, and the reception section starts reception of the concerned data after the reporting section has reported the acquisition of the attribute data of the concerned data to the user.

    摘要翻译: 一种自动搜索和传送装置,其自动搜索和传送经由网络连接的一个或多个计算机的数据,其包括输入至少一个关键字的关键字输入部分,搜索包括至少一个关键字的数据的搜索部分,并获取 来自经由网络连接的一台以上的计算机的有关数据的属性数据,向用户报告与有关数据有关的信息的报告部,从一台以上的计算机接收有关数据的接收部,以及数据存储部 存储数据。 报告部分在获取属性数据时向用户报告属性数据的获取,并且在报告部分已经向用户报告了有关数据的属性数据的获取之后,接收部分开始接收相关数据。

    Semiconductor Integrated Circuit
    18.
    发明申请
    Semiconductor Integrated Circuit 有权
    半导体集成电路

    公开(公告)号:US20110205780A1

    公开(公告)日:2011-08-25

    申请号:US12880758

    申请日:2010-09-13

    IPC分类号: G11C11/00

    摘要: In one embodiment, a semiconductor integrated circuit includes a first resistive-change element, a second resistive-change element and a first switching element. The first resistive-change element includes one end having a first polarity connected to a first power source. The first resistive-change element includes another end having a second polarity connected to an output node. The second resistive-change element includes one end having the second polarity connected to the output node. The first switching element includes a first terminal connected to another end of the second resistive-change element. The first switching element includes a second terminal connected to a second power source.

    摘要翻译: 在一个实施例中,半导体集成电路包括第一电阻变化元件,第二电阻变化元件和第一开关元件。 第一电阻变化元件包括具有连接到第一电源的第一极性的一端。 第一电阻变化元件包括具有连接到输出节点的第二极性的另一端。 第二电阻变化元件包括具有连接到输出节点的第二极性的一端。 第一开关元件包括连接到第二电阻变化元件的另一端的第一端子。 第一开关元件包括连接到第二电源的第二端子。

    Semiconductor integrated circuit
    19.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US07795920B2

    公开(公告)日:2010-09-14

    申请号:US12367379

    申请日:2009-02-06

    申请人: Shinichi Yasuda

    发明人: Shinichi Yasuda

    IPC分类号: H03K19/00

    CPC分类号: G01R31/31725 G01R31/31727

    摘要: A semiconductor integrated circuit includes a flipflop holding and outputting input data according to a clock, the flipflop having: an input end to which data is input; an output end from which data is output; a first logic gate connected between the input end and the output end, the first logic gate operating according to the clock; a second logic gate connected between the first logic gate and the output end, the second logic gate operating according to the clock; and a buffer circuit. An input of the buffer circuit is connected to a node between the first logic gate and the input end. An output of the buffer circuit is connected to a node in an output side of the first logic gate. The buffer circuit transitions according to an enable signal from a high impedance state to a state in which a signal can be transmitted.

    摘要翻译: 一种半导体集成电路包括触发器,其保持并根据时钟输出输入数据,所述触发器具有:输入数据的输入端; 输出数据的输出端; 连接在输入端和输出端之间的第一逻辑门,第一逻辑门根据时钟工作; 连接在第一逻辑门和输出端之间的第二逻辑门,第二逻辑门根据时钟工作; 和缓冲电路。 缓冲电路的输入连接到第一逻辑门和输入端之间的节点。 缓冲电路的输出连接到第一逻辑门的输出侧的节点。 缓冲电路根据从高阻抗状态的使能信号转换到可以发送信号的状态。

    Random number generating circuit, semiconductor integrated circuit, IC card and information terminal device
    20.
    发明授权
    Random number generating circuit, semiconductor integrated circuit, IC card and information terminal device 有权
    随机数发生电路,半导体集成电路,IC卡和信息终端装置

    公开(公告)号:US07392271B2

    公开(公告)日:2008-06-24

    申请号:US10919291

    申请日:2004-08-17

    IPC分类号: G06F1/02

    CPC分类号: G06F7/58

    摘要: A random number generating circuit receives as input a first digital random number signal generated at a first generating rate and produces as output a second digital random number signal having a second generating rate that is twice as high as the first generating rate. A semiconductor integrated circuit, an IC card and an information terminal device comprising the random number circuit is provided.

    摘要翻译: 随机数产生电路接收以第一产生速率产生的第一数字随机数信号作为输出,产生第二数字随机数信号,该第二数字随机数信号的第二发生速率是第一发生速率的两倍。 提供了包括随机数电路的半导体集成电路,IC卡和信息终端装置。