公开(公告)号：US20150115445A1

公开(公告)日：2015-04-30

申请号：US14068837

申请日：2013-10-31

Applicant: Micron Technology, Inc.

Inventor： Anurag Jindal ,  Jian He ,  Lalapet Rangan Vasudevan ,  Kyle K. Kirby ,  Hongqi Li

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76801 ,  H01L21/76838 ,  H01L21/76898 ,  H01L23/522 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of manufacturing semiconductor devices and semiconductor devices with through-substrate vias (TSVs). One embodiment of a method of manufacturing a semiconductor device includes forming an opening through a dielectric structure and at least a portion of a semiconductor substrate, and forming a dielectric liner material having a first portion lining the opening and a second portion on an outer surface of the dielectric structure laterally outside of the opening. The method further includes removing the conductive material such that the second portion of the dielectric liner material is exposed, and forming a damascene conductive line in the second portion of the dielectric liner material that is electrically coupled to the TSV.

Abstract translation: 制造具有贯通衬底通孔（TSV）的半导体器件和半导体器件的方法。 制造半导体器件的方法的一个实施例包括通过电介质结构和半导体衬底的至少一部分形成开口，以及形成具有衬在开口上的第一部分的电介质衬垫材料和在外表面上的第二部分 电介质结构横向于开口外侧。 该方法还包括去除导电材料，使得电介质衬垫材料的第二部分被暴露，并且在电耦合到TSV的电介质衬垫材料的第二部分中形成镶嵌导电线。

公开(公告)号：US11742282B2

公开(公告)日：2023-08-29

申请号：US16988422

申请日：2020-08-07

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Rita J. Klein ,  Everett A. McTeer ,  John D. Hopkins ,  Shuangqiang Luo ,  Song Kai Tan ,  Jing Wai Fong ,  Anurag Jindal ,  Chieh Hsien Quek

IPC: H01L23/522 ,  H01L21/768 ,  H10B43/27 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/76877 ,  H10B43/27 ,  H01L23/53209 ,  H01L23/53266

Abstract: Some embodiments include conductive interconnects which include the first and second conductive materials, and which extend upwardly from a conductive structure. Some embodiments include integrated assemblies having conductive interconnects.

公开(公告)号：US10546777B2

公开(公告)日：2020-01-28

申请号：US15889120

申请日：2018-02-05

Applicant: Micron Technology, Inc.

Inventor： Hongqi Li ,  Anurag Jindal ,  Jin Lu ,  Shyam Ramalingam

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/288

Abstract: Semiconductor devices having interconnects incorporating negative expansion (NTE) materials are disclosed herein. In one embodiment a semiconductor device includes a substrate having an opening that extends at least partially through the substrate. A conductive material having a positive coefficient of thermal expansion (CTE) partially fills the opening. A negative thermal expansion (NTE) having a negative CTE also partially fills the opening. In one embodiment, the conductive material includes copper and the NTE material includes zirconium tungstate.

公开(公告)号：US20160190042A1

公开(公告)日：2016-06-30

申请号：US15059020

申请日：2016-03-02

Applicant: Micron Technology, Inc.

Inventor： Anurag Jindal ,  Jian He ,  Lalapet Rangan Vasudevan ,  Kyle K. Kirby ,  Hongqi Li

IPC: H01L23/48 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/76801 ,  H01L21/76838 ,  H01L21/76898 ,  H01L23/522 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of manufacturing semiconductor devices and semiconductor devices with through-substrate vias (TSVs). One embodiment of a method of manufacturing a semiconductor device includes forming an opening through a dielectric structure and at least a portion of a semiconductor substrate, and forming a dielectric liner material having a first portion lining the opening and a second portion on an outer surface of the dielectric structure laterally outside of the opening. The method further includes removing the conductive material such that the second portion of the dielectric liner material is exposed, and forming a damascene conductive line in the second portion of the dielectric liner material that is electrically coupled to the TSV.

公开(公告)号：US10475810B2

公开(公告)日：2019-11-12

申请号：US16023124

申请日：2018-06-29

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11524 ,  H01L23/528 ,  H01L23/532

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US20180308861A1

公开(公告)日：2018-10-25

申请号：US16023124

申请日：2018-06-29

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L23/532 ,  H01L27/11524 ,  H01L27/11556 ,  H01L23/528

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US10014319B1

公开(公告)日：2018-07-03

申请号：US15679499

申请日：2017-08-17

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L23/532 ,  H01L27/11556 ,  H01L23/528

CPC classification number: H01L27/11582 ,  H01L23/528 ,  H01L23/53266 ,  H01L27/11524 ,  H01L27/11556

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US09922875B2

公开(公告)日：2018-03-20

申请号：US15653365

申请日：2017-07-18

Applicant: Micron Technology, Inc.

Inventor： Hongqi Li ,  Anurag Jindal ,  Jin Lu ,  Shyam Ramalingam

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/288

CPC classification number: H01L21/76879 ,  H01L21/2885 ,  H01L21/76841 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices having interconnects incorporating negative expansion (NTE) materials are disclosed herein. In one embodiment a semiconductor device includes a substrate having an opening that extends at least partially through the substrate. A conductive material having a positive coefficient of thermal expansion (CTE) partially fills the opening. A negative thermal expansion (NTE) having a negative CTE also partially fills the opening. In one embodiment, the conductive material includes copper and the NTE material includes zirconium tungstate.

公开(公告)号：US20170316974A1

公开(公告)日：2017-11-02

申请号：US15653365

申请日：2017-07-18

Applicant: Micron Technology, Inc.

Inventor： Hongqi Li ,  Anurag Jindal ,  Jin Lu ,  Shyam Ramalingam

IPC: H01L21/768 ,  H01L21/288 ,  H01L23/48

CPC classification number: H01L21/76879 ,  H01L21/2885 ,  H01L21/76841 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices having interconnects incorporating negative expansion (NTE) materials are disclosed herein. In one embodiment a semiconductor device includes a substrate having an opening that extends at least partially through the substrate. A conductive material having a positive coefficient of thermal expansion (CTE) partially fills the opening. A negative thermal expansion (NTE) having a negative CTE also partially fills the opening. In one embodiment, the conductive material includes copper and the NTE material includes zirconium tungstate.

公开(公告)号：US09773807B1

公开(公告)日：2017-09-26

申请号：US15455859

申请日：2017-03-10

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/115 ,  H01L27/11582 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L27/11582 ,  H01L23/528 ,  H01L23/53266 ,  H01L27/11524 ,  H01L27/11556

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.