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    ADAPTIVE BLOCK MAPPING
    11.
    发明公开
    ADAPTIVE BLOCK MAPPING 审中-公开

    公开(公告)号：US20230376245A1

    公开(公告)日：2023-11-23

    申请号：US17750131

    申请日：2022-05-20

    Applicant: Micron Technology, Inc.

    Inventor： Alberto Sassara ,  Giuseppe D'Eliseo ,  Lalla Fatima Drissi ,  Luigi Esposito ,  Paolo Papa ,  Salvatore Del Prete ,  Xiangang Luo ,  Xiaolai Zhu

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0679

    Abstract: Methods, systems, and devices for adaptive block mapping are described. In some examples, a first superblock and a second superblock may be established across one or more dice of a memory device. The superblocks may each include one or more blocks from a plurality of planes of a memory die. In some examples, the second superblock may include at least one bad block (e.g., defective block) in addition to one or more good blocks (e.g., non-defective blocks). The memory device may receive a command for writing data in a first mode and may write a first subset of the data to the first superblock in the first mode, a second subset of the data to the second superblock in the first mode, and one or more blocks associated with the second superblock in a second mode. Additionally or alternatively, the memory device may receive a second command for writing data in the second mode and may write the data to the first superblock in the first mode.

    FATAL ERROR LOGGING IN A MEMORY DEVICE
    14.
    发明申请
    FATAL ERROR LOGGING IN A MEMORY DEVICE 有权

    公开(公告)号：US20210055982A1

    公开(公告)日：2021-02-25

    申请号：US16544269

    申请日：2019-08-19

    Applicant: Micron Technology, Inc.

    Inventor： Luigi Esposito ,  Paolo Papa ,  Massimo laculo ,  Erika Morvillo

    IPC: G06F11/07

    Abstract: Devices and techniques for fatal error logging in a memory device are described herein. For example a read request can be received for a component of the memory device. A fatal error indication of an error that prevents correct execution of read request can be detected. Diagnostic information for the failure indication can be collected. A response to the read request can then be made with a portion of the diagnostic information as payload instead of the user data that would have occupied the payload had the read succeeded. Metadata in the response can be used to communicate an error code.

    ALLOCATION SCHEMA FOR A SCALABLE MEMORY AREA
    15.
    发明申请
    ALLOCATION SCHEMA FOR A SCALABLE MEMORY AREA 有权

    公开(公告)号：US20210055966A1

    公开(公告)日：2021-02-25

    申请号：US16549218

    申请日：2019-08-23

    Applicant: Micron Technology, Inc.

    Inventor： Angelo Della Monica ,  Paolo Papa ,  Carminantonio Manganelli ,  Massimo Iaculo

    IPC: G06F9/50 ,  G06F12/1009 ,  G06F3/06

    Abstract: A variety of applications can include systems and methods that control a memory size of a changelog in a storage device, where the changelog is implemented to correlate virtual page addresses to physical addresses in one or more memory devices. The memory size can be controlled by an allocation schema for a scalable memory area for the changelog in the storage device. The allocation schema can include using bitmaps, lists linked to the bitmaps, and a counter to count bits asserted in the bitmaps such that the allocation of memory space in the storage device can depend on usage rather than allocating a large memory space for all possible correlations of virtual page addresses to physical addresses.

    CORRUPTED STORAGE PORTION RECOVERY IN A MEMORY DEVICE
    16.
    发明申请
    CORRUPTED STORAGE PORTION RECOVERY IN A MEMORY DEVICE 有权

    公开(公告)号：US20240394183A1

    公开(公告)日：2024-11-28

    申请号：US18793378

    申请日：2024-08-02

    Applicant: Micron Technology, Inc.

    Inventor： Lalla Fatima Drissi ,  Giuseppe D'Eliseo ,  Paolo Papa ,  Massimo Iaculo ,  Carminantonio Manganelli

    IPC: G06F12/02 ,  G06F3/06

    Abstract: Devices and techniques for corrupted storage portion recovery in a memory device are described herein. A failure event can be detected during a garbage collection operation on a collection of storage portions (e.g., pages) in a memory array. Here, members of the collection of storage portions are being moved from a former physical location to a new physical location by the garbage collection operation. A reference to a former physical location of a possibly corrupt storage portion in the collection of storage portions can be retrieved in response to the failure event. Here, the possibly corrupt storage portion has already been written to a new physical location as part of the garbage collection operation. The possibly corrupt storage portion can then be rewritten at the new physical location using data from the former physical location.

    Corrupted storage portion recovery in a memory device
    17.
    发明授权
    Corrupted storage portion recovery in a memory device 有权

    公开(公告)号：US12056046B2

    公开(公告)日：2024-08-06

    申请号：US17136819

    申请日：2020-12-29

    Applicant: Micron Technology, Inc.

    Inventor： Lalla Fatima Drissi ,  Giuseppe D'Eliseo ,  Paolo Papa ,  Massimo Iaculo ,  Carminantonio Manganelli

    IPC: G06F12/02 ,  G06F3/06

    CPC classification number: G06F12/0253 ,  G06F3/0614 ,  G06F3/0647 ,  G06F3/0679

    Abstract: Devices and techniques for corrupted storage portion recovery in a memory device are described herein. A failure event can be detected during a garbage collection operation on a collection of storage portions (e.g., pages) in a memory array. Here, members of the collection of storage portions are being moved from a former physical location to a new physical location by the garbage collection operation. A reference to a former physical location of a possibly corrupt storage portion in the collection of storage portions can be retrieved in response to the failure event. Here, the possibly corrupt storage portion has already been written to a new physical location as part of the garbage collection operation. The possibly corrupt storage portion can then be rewritten at the new physical location using data from the former physical location.

    Power management techniques
    18.
    发明授权
    Power management techniques 有权

    公开(公告)号：US12032836B2

    公开(公告)日：2024-07-09

    申请号：US17397733

    申请日：2021-08-09

    Applicant: Micron Technology, Inc.

    Inventor： Luca Porzio ,  Paolo Papa ,  Crescenzo Attanasio

    IPC: G06F3/06 ,  G06F12/0804 ,  G06F12/10

    CPC classification number: G06F3/0625 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0804 ,  G06F12/10 ,  G06F2212/1028

    Abstract: Methods, systems, and devices for power management techniques are described. A memory system may receive a command to exit a first power mode and enter a second power mode. The first power mode may have a lower power consumption than the second power mode. The memory system may determine whether a duration of an idle period associated with the first power mode satisfies a threshold based on receiving the command to exit the first power mode. The memory system may receive another command associated with executing a flush operation and perform one or more power management operations based on receiving the command and determining that the duration satisfies the threshold.

    Memory sub-system managing remapping for misaligned memory components
    20.
    发明授权
    Memory sub-system managing remapping for misaligned memory components 有权

    公开(公告)号：US11727969B2

    公开(公告)日：2023-08-15

    申请号：US17532364

    申请日：2021-11-22

    Applicant: Micron Technology, Inc.

    Inventor： Luca Porzio ,  Marco Di Pasqua ,  Paolo Papa

    IPC: G11C8/00 ,  G11C29/00 ,  G06F11/07 ,  G06F12/02

    CPC classification number: G11C8/00 ,  G06F11/073 ,  G06F12/0238 ,  G06F12/0292 ,  G11C29/76

    Abstract: A processing device of a system receives a request to access a selected sector in a memory component. The selected sector is associated with a sector number. The processing device determines a virtual block corresponding to the selected sector. The virtual block is associated with a misalignment factor and a misalignment counter. The processing device determines if the misalignment counter satisfies a threshold criterion. In response to the misalignment counter satisfying the threshold criterion, the processing device generates an updated sector number by shifting the sector number by the misalignment factor and performs the access to the selected sector using the updated sector number. In response to the misalignment counter not satisfying the threshold criterion, the processing device updates the misalignment counter and performs the access to the selected sector using the sector number.

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