IMAGE SENSOR FAR END DRIVER CIRCUITRY PROVIDING FAST SETTLING ROW CONTROL SIGNALS

    公开(公告)号:US20210152756A1

    公开(公告)日:2021-05-20

    申请号:US16685663

    申请日:2019-11-15

    Abstract: An image sensor includes a pixel array with rows and columns of pixels. Each row of the pixel array has a first end that is opposite a second end of each row of the pixel array. Control circuitry is coupled to the first end of each row of the pixel array to provide control signals to each row of the pixel array from the first end of each row of the pixel array. Far end driver circuitry coupled to the second end of each row of the pixel array to selectively further drive from the second end of each row of the pixel array the control signals provided by the control circuitry from the first end of each row of the pixel array. The control circuitry is further coupled to provide far end control signals to the far end driver circuitry.

    Bitline settling improvement and FPN reduction by floating bitline during charge transfer

    公开(公告)号:US10290673B1

    公开(公告)日:2019-05-14

    申请号:US15853463

    申请日:2017-12-22

    Abstract: A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges from the photodiode to the floating diffusion. A transfer gate voltage controls the transmission of the image charges from a transfer receiving terminal of the transfer transistor to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a gate terminal of the source follower and provide an amplified signal to a source terminal of the source follower. A row select transistor is coupled to enable the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. The bitline source node is coupled to a blacksun voltage generator. A current source generator is coupled between the bitline source node and a ground. The current source generator provides adjustable current to the bitline source node through a bias transistor controlled by a bias control voltage.

    Global shutter correction
    13.
    发明授权

    公开(公告)号:US09819883B2

    公开(公告)日:2017-11-14

    申请号:US14958080

    申请日:2015-12-03

    CPC classification number: H04N5/357 H04N5/3745

    Abstract: A pixel circuit includes a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed into the photodiode, and a transfer transistor coupled to the photodiode. The circuit also includes a noise correction circuit coupled to receive a transfer control signal and the noise correction circuit is coupled to selectively enable or disable the transfer transistor from receiving the transfer control signal. A storage transistor is coupled to the transfer transistor, and the transfer transistor is coupled to selectively transfer the image charge accumulated in the photodiode to the storage transistor for storage in response to the transfer control signal if the transfer transistor is enabled to receive the transfer control signal.

    Image sensor with in-pixel background subtraction and motion detection

    公开(公告)号:US11622087B2

    公开(公告)日:2023-04-04

    申请号:US17167768

    申请日:2021-02-04

    Abstract: An imaging system includes a pixel array configured to generate image charge voltage signals in response to incident light received from an external scene. An infrared illumination source is deactivated during the capture of a first image of the external scene and activated during the capture of a second image of the external scene. An array of sample and hold circuits is coupled to the pixel array. Each sample and hold circuit is coupled to a respective pixel of the pixel array and includes first and second capacitors to store first and second image charge voltage signals of the captured first and second images, respectively. A column voltage domain differential amplifier is coupled to the first and second capacitors to determine a difference between the first and second image charge voltage signals to identify an object in a foreground of the external scene.

    IMAGE SENSOR WITH SHIFTED COLOR FILTER ARRAY PATTERN AND BIT LINE PAIRS

    公开(公告)号:US20220159222A1

    公开(公告)日:2022-05-19

    申请号:US17649890

    申请日:2022-02-03

    Abstract: An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

    GLOBAL SHUTTER CORRECTION
    18.
    发明申请

    公开(公告)号:US20170163912A1

    公开(公告)日:2017-06-08

    申请号:US14958080

    申请日:2015-12-03

    CPC classification number: H04N5/357 H04N5/3745

    Abstract: A pixel circuit includes a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed into the photodiode, and a transfer transistor coupled to the photodiode. The circuit also includes a noise correction circuit coupled to receive a transfer control signal and the noise correction circuit is coupled to selectively enable or disable the transfer transistor from receiving the transfer control signal. A storage transistor is coupled to the transfer transistor, and the transfer transistor is coupled to selectively transfer the image charge accumulated in the photodiode to the storage transistor for storage in response to the transfer control signal if the transfer transistor is enabled to receive the transfer control signal.

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