METHOD FOR SORTING OPTOELECTRONIC SEMICONDUCTOR COMPONENTS AND DEVICE FOR SORTING OPTOELECTRONIC SEMICONDUCTOR COMPONENTS

    公开(公告)号:US20220148897A1

    公开(公告)日:2022-05-12

    申请号:US17440841

    申请日:2020-02-25

    Abstract: A method for sorting optoelectronic semiconductor components is specified. The semiconductor components each include an active region for emission or detection of electromagnetic radiation. The method includes the following steps: introducing the semiconductor components into a sorting region on a specified path; irradiating the optoelectronic semiconductor components with electromagnetic radiation of a first wavelength range to generate dipole moments by charge separation in the active regions of the optoelectronic semiconductor components; and deflecting the optoelectronic semiconductor components from the specified path as a function of their dipole moment by means of a non-homogeneous electromagnetic field. A device for sorting optoelectronic semiconductor components is further specified.

    OPTOELECTRONIC COMPONENT
    17.
    发明申请

    公开(公告)号:US20180315891A1

    公开(公告)日:2018-11-01

    申请号:US15770334

    申请日:2016-10-24

    Abstract: The invention relates to an optoelectronic component (100) comprising a semiconductor layer sequence (1) having an active layer (10), wherein the active layer (10) is designed to produce or absorb electromagnetic radiation in intended operation. Furthermore, the component (100) comprises a first contact structure (11) and a second structure (12), by means of which the semiconductor layer sequence (1) can be electrically contacted in intended operation. In operation, a voltage is applied to the contact structures (11, 12), wherein an operation-related voltage difference ΔUbet between the contact structures (11, 12) arises. When the voltage difference is increased, a first arc-over occurs in or on the component (100) between the two contact structures (11, 12). A spark gap (3) between the contact structures (11, 12), which arises in the event of the first arc-over, passes predominantly through a surrounding medium in the form of gas or vacuum and/or through a potting. The first arc-over occurs at a voltage difference of 2·ΔUbet at the earliest.

    SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT

    公开(公告)号:US20180254389A1

    公开(公告)日:2018-09-06

    申请号:US15760209

    申请日:2016-09-14

    Abstract: The invention relates to a semiconductor component comprising: a semiconductor chip (10) which has a semiconductor body (1) with an active region (12) and a substrate (3) with a first conductor body (31), a second conductor body (32) and a first moulded body (33); and a second moulded body (5); wherein the second moulded body (5) completely surrounds the semiconductor chip (10) in lateral directions (L), the semiconductor chip (10) extends all the way through the second moulded body (5) in a vertical direction (V), at least some parts of an upper side and a lower side of the semiconductor chip (10) are not covered by the second moulded body (5), the substrate (3) is mechanically connected to the semiconductor body (2), the active region (12) is connected to the first conductor body (31) and the second conductor body (32) in an electroconductive manner, and the second moulded body (5) is directly adjacent to the substrate (3) and the semiconductor body (1).

    OPTOELECTRONIC SEMICONDUCTOR COMPONENT
    19.
    发明申请

    公开(公告)号:US20180197843A1

    公开(公告)日:2018-07-12

    申请号:US15741731

    申请日:2016-07-04

    Abstract: An optoelectronic semiconductor component is disclosed, comprising: a semiconductor body (1) having a semiconductor layer sequence (2) with a p-type semiconductor region (3), an n-type semiconductor region (5), and an active layer (4) arranged between the p-type semiconductor region (3) and the n-type semiconductor region (5); a support (10) having a plastic material and a first via (11) and a second via (12); a p-contact layer (7) and an n-contact layer (8), at least some regions of which are arranged between the support (10) and the semiconductor body (1), wherein the p-contact layer (7) connects the first via (11) to the p-type semiconductor region (3) and the n-contact layer (8, 8A) connects the second via (12) to the n-type semiconductor region (5); and an ESD protection element (15) which is arranged between the support (10) and the semiconductor body (1), wherein the ESD protection element (15) is electrically conductively connected to the first via (11) and to the second via (12), and wherein a forward direction of the ESD protection element (15) is anti-parallel to a forward direction of the semiconductor layer sequence (2).

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