公开(公告)号：US20190259701A1

公开(公告)日：2019-08-22

申请号：US16006657

申请日：2018-06-12

Applicant: QUALCOMM Incorporated

Inventor： Haitao CHENG ,  Zhang JIN

IPC: H01L23/522 ,  H01L23/528 ,  H01L49/02

Abstract: An integrated circuit includes a capacitor (e.g., a folded metal-oxide-metal (MOM) capacitor) formed in the lower BEOL interconnect levels, without degrading an inductor's Q-factor. The integrated circuit includes the capacitor in one or more back-end-of-line (BEOL) interconnect levels. The capacitor includes multiple folded capacitor fingers having multiple sides and a pair of manifolds on a same side of the folded capacitor fingers. Each of the pair of manifolds is coupled to one or more of the folded capacitor fingers. The integrated circuit also includes an inductive trace having one or more turns in one or more different BEOL interconnect levels. The inductive trace overlaps one or more portions of the capacitor.

公开(公告)号：US20180294540A1

公开(公告)日：2018-10-11

申请号：US15947293

申请日：2018-04-06

Applicant: QUALCOMM Incorporated

Inventor： Haitao CHENG ,  Zhang JIN ,  Abbas ABBASPOUR-TAMIJANI

IPC: H01P5/18 ,  H03F1/56 ,  H03F3/20 ,  H03H7/01 ,  H03H7/46 ,  H03H7/48 ,  H04L25/02 ,  H04W88/06 ,  H04B1/04 ,  H04B1/18

CPC classification number: H01P5/18 ,  H01P5/187 ,  H03F1/565 ,  H03F3/195 ,  H03F3/20 ,  H03F3/245 ,  H03F3/60 ,  H03F2200/207 ,  H03F2200/465 ,  H03F2200/541 ,  H03H7/0115 ,  H03H7/0138 ,  H03H7/1741 ,  H03H7/468 ,  H03H7/487 ,  H04B1/04 ,  H04B1/0458 ,  H04B1/18 ,  H04B2001/0408 ,  H04L25/0264 ,  H04W88/06

Abstract: Certain aspects of the present disclosure provide a directional coupler. In certain aspects, the directional coupler generally includes a first inductor and a second inductor wirelessly coupled to the first inductor. In certain aspects, the directional coupler generally includes an input port at a first terminal of the first inductor and a transmitted port at a second terminal of the first inductor. In certain aspects, the directional coupler generally includes a coupled port at a first terminal of the second inductor and an isolated port at a second terminal of the second inductor. In certain aspects, the directional coupler generally includes a first complex impedance component directly coupled to the isolated port and a second complex impedance component directly coupled to the coupled port.

公开(公告)号：US20200266791A1

公开(公告)日：2020-08-20

申请号：US16275574

申请日：2019-02-14

Applicant: QUALCOMM Incorporated

Inventor： Haitao CHENG ,  Yanming XIAO ,  Wu-Hsin CHEN ,  Li LIU ,  Masoud MOSLEHI BAJESTAN

IPC: H03H7/01

Abstract: A low-pass filter having a notch frequency due to a resonance between a mutual inductance of inductive elements and a capacitance. An exemplary low-pass filter generally includes a first inductive element having a first terminal and a second terminal, the first terminal being coupled to the input port, and a second inductive element having a first terminal and a second terminal, the first terminal of the second inductive element being coupled to the second terminal of the first inductive element and the second terminal of the second inductive element being coupled to the output port. The filter also includes a shunt capacitive element coupled to the second terminal of the first inductive element, wherein a mutual inductance between the first inductive element and the second inductive element and a capacitance of the shunt capacitive element are configured to have a resonance providing a notch frequency for the low-pass filter.

公开(公告)号：US20200051718A1

公开(公告)日：2020-02-13

申请号：US16058928

申请日：2018-08-08

Applicant: QUALCOMM Incorporated

Inventor： Haitao CHENG ,  Chao SONG ,  Ye LU

IPC: H01C3/02 ,  H01L49/02 ,  H01L27/02 ,  G06F17/50 ,  H01C3/16 ,  H01C17/04

Abstract: A co-wound resistor with a low parasitic inductance includes a first resistive strip having an input and a second resistive strip having an output. The second resistive strip has a similar shape as the first resistive strip. The second resistive strip is co-wound in a same direction as the first resistive strip. The second resistive strip and the first resistive strip are configured to generate a mutual inductance that cancels an inductance of the first resistive strip and the second resistive strip. The first interconnect coupling the first resistive strip to the second resistive strip. The first resistive strip, the second resistive strip and the first interconnect are on a same level.

公开(公告)号：US20200044013A1

公开(公告)日：2020-02-06

申请号：US16053124

申请日：2018-08-02

Applicant: QUALCOMM Incorporated

Inventor： Ye LU ,  Haitao CHENG ,  Chao SONG

IPC: H01L49/02 ,  H01L21/02 ,  H01L21/283 ,  H01L21/311

Abstract: A capacitor includes a first conductive element having a plurality of first conductive fingers and a second conductive element having a plurality of second conductive fingers. The first conductive fingers are interdigitated with the second conductive fingers. The capacitor further includes a conformally deposited dielectric material that separates the plurality of first conductive fingers from the plurality of second conductive fingers.

公开(公告)号：US20190006728A1

公开(公告)日：2019-01-03

申请号：US15687129

申请日：2017-08-25

Applicant: QUALCOMM Incorporated

Inventor： Haitao CHENG ,  Zhang JIN

IPC: H01P3/00 ,  H01P11/00 ,  H01P1/30

CPC classification number: H01P3/003 ,  H01P1/2005 ,  H01P1/20345 ,  H01P1/30 ,  H01P3/006 ,  H01P3/026 ,  H01P11/001 ,  H05K1/0227 ,  H05K1/0245

Abstract: A coplanar waveguide may include a first transmission line extending between a first ground plane and a second ground plane at a first interconnect level. The coplanar waveguide may further include a shielding layer at a second interconnect level. The shielding layer may include a first set of conductive fingers coupled to the first ground plane. The first set of conductive fingers may be interdigitated with a second set of conductive fingers that are coupled to the second ground plane. Only a dielectric layer may be between the first set of conductive interdigitated fingers and the second set of conductive interdigitated fingers. The first ground plane, the second ground plane, the dielectric layer, and the shielding layer may form a capacitor.