公开(公告)号：US20190157506A1

公开(公告)日：2019-05-23

申请号：US16259478

申请日：2019-01-28

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Mae Yi KIM ,  Jin Woong LEE ,  Yeo Jin YOON ,  Seom Geun LEE ,  Yong Woo RYU ,  Keum Ju Lee

IPC: H01L33/14 ,  H01L33/38 ,  H01L33/32 ,  H01L33/42 ,  H01L33/62

CPC classification number: H01L33/145 ,  H01L33/20 ,  H01L33/32 ,  H01L33/38 ,  H01L33/42 ,  H01L33/62

Abstract: A light emitting diode is provided to comprises: a substrate that has an elongated rectangular shape in one direction; a light emitting structure positioned on the substrate and having an opening for exposing a first conductive semiconductor layer; a first electrode pad disposed to be closer to a first corner of the substrate; a second electrode pad disposed to be relatively closer to a second corner of the substrate opposing to the first corner; a first extension extending from the first electrode pad; and a second extension and a third extension extending from the second electrode pad to sides of the first extension, wherein an imaginary line connecting an end of the second extension and an end of the third extension is located between the first electrode pad and the first corner.

公开(公告)号：US20170301826A1

公开(公告)日：2017-10-19

申请号：US15490492

申请日：2017-04-18

Applicant: Seoul Viosys Co., Ltd.

Inventor： Keum Ju LEE ,  Seom Geun LEE ,  Kyoung Wan KIM ,  Yong Woo RYU ,  Mi Na JANG

IPC: H01L33/14 ,  H01L33/42 ,  H01L33/32 ,  H01L33/10 ,  H01L33/06 ,  H01L33/62 ,  H01L27/15

CPC classification number: H01L33/145 ,  H01L27/15 ,  H01L27/156 ,  H01L33/06 ,  H01L33/10 ,  H01L33/32 ,  H01L33/38 ,  H01L33/42 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/00014

Abstract: A light emitting diode includes: a substrate; a semiconductor stack disposed on the substrate and including a lower semiconductor layer, an upper semiconductor layer and an active layer interposed between the lower semiconductor layer and the upper semiconductor layer, the semiconductor stack having an isolation groove exposing the substrate through the upper semiconductor layer, the active layer and the lower semiconductor layer; a first electrode pad and an upper extension portion electrically connected to the upper semiconductor layer; a second electrode pad and a lower extension portion electrically connected to the lower semiconductor layer; a connecting portion connecting the upper extension portion and the lower extension portion to each other across the isolation groove; a first current blocking layer interposed between the lower extension portion and the lower semiconductor layer; and a second current blocking layer interposed between the second electrode pad and the lower semiconductor layer.

公开(公告)号：US20240363600A1

公开(公告)日：2024-10-31

申请号：US18769385

申请日：2024-07-11

Applicant: Seoul Viosys Co., Ltd.

Inventor： Seom Geun LEE ,  Seong-Kyu JANG ,  Yong Woo RYU ,  Jong Hyeon CHAE

IPC: H01L25/075 ,  H01L33/42 ,  H01L33/62

CPC classification number: H01L25/0756 ,  H01L25/0753 ,  H01L33/42 ,  H01L33/62

Abstract: A light emitting module including a circuit board and a lighting emitting device thereon and including first, second, and third LED stacks each including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, a first planarization layer between the second bonding layer and the third LED stack, a second planarization layer on the first LED stack, a lower conductive material extending along sides of the first planarization layer, the second LED stack, the first bonding layer, and electrically connected to the first conductivity type semiconductor layers of each LED stack, respectively, and an upper conductive material between the circuit board and the lower conductive material.

公开(公告)号：US20240355867A1

公开(公告)日：2024-10-24

申请号：US18760330

申请日：2024-07-01

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Seong Kyu JANG ,  Seom Geun LEE ,  Yong Woo RYU

IPC: H01L27/15 ,  H01L33/62

CPC classification number: H01L27/15 ,  H01L33/62 ,  H01L2933/0066

Abstract: A stacked light emitting device includes a first LED stack, a second LED stack disposed under the first LED stack, a third LED stack disposed under the second LED stack, and a plurality of pads disposed over the first LED stack. Each of the first, second, and third LED stacks has a light generation region and a peripheral region disposed around the light generation region. The plurality of pads is disposed on the peripheral region of the first LED stack.

公开(公告)号：US20230005892A1

公开(公告)日：2023-01-05

申请号：US17902893

申请日：2022-09-04

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Seom Geun LEE ,  Seong Kyu JANG ,  Yong Woo RYU ,  Jong Hyeon CHAE

IPC: H01L25/075 ,  H01L33/62 ,  H01L33/42

Abstract: A light emitting module including a circuit board and a lighting emitting device thereon and including first, second, and third LED stacks each including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, a first planarization layer between the second bonding layer and the third LED stack, a second planarization layer on the first LED stack, a lower conductive material extending along sides of the first planarization layer, the second LED stack, the first bonding layer, and electrically connected to the first conductivity type semiconductor layers of each LED stack, respectively, and an upper conductive material between the circuit board and the lower conductive material, in which a width of an upper end of the upper conductive material is greater than a width of the corresponding upper conductive material.

公开(公告)号：US20220165914A1

公开(公告)日：2022-05-26

申请号：US17586804

申请日：2022-01-28

Applicant: Seoul Viosys Co., Ltd.

Inventor： Keum Ju LEE ,  Seom Geun LEE ,  Kyoung Wan KIM ,  Yong Woo RYU ,  Mi Na JANG

IPC: H01L33/14 ,  H01L27/15 ,  H01L33/38 ,  H01L33/06 ,  H01L33/10 ,  H01L33/32 ,  H01L33/42 ,  H01L33/62

Abstract: A light emitting diode including a substrate having a first area and a second area defined by an isolation groove line, a semiconductor stack disposed on the substrate and including a lower semiconductor layer, an upper semiconductor layer, an active layer, a first electrode pad electrically connected to the lower semiconductor layer, a second electrode pad electrically connected to the upper semiconductor layer, and a connecting portion electrically connecting the semiconductor stack disposed in the first and second areas to each other, and including a first portion, a second portion, and a third portion extending from a second distal end of the first portion, in which the isolation groove line is disposed between the first and second electrode pads and exposes the substrate, the first portion extends along a first direction substantially parallel to an extending direction of the isolation groove line, and the second and third portions extend in a second direction crossing the first direction.

公开(公告)号：US20210375980A1

公开(公告)日：2021-12-02

申请号：US17318475

申请日：2021-05-12

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Seong Kyu JANG ,  Seom Geun LEE ,  Yong Woo RYU

IPC: H01L27/15 ,  H01L33/62

Abstract: A stacked light emitting device includes a first LED stack, a second LED stack disposed under the first LED stack, a third LED stack disposed under the second LED stack, and a plurality of pads disposed over the first LED stack. Each of the first, second, and third LED stacks has a light generation region and a peripheral region disposed around the light generation region. The plurality of pads is disposed on the peripheral region of the first LED stack.

公开(公告)号：US20210151421A1

公开(公告)日：2021-05-20

申请号：US17096289

申请日：2020-11-12

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Seom Geun LEE ,  Seong Kyu JANG ,  Yong Woo RYU ,  Jong Hyeon CHAE

IPC: H01L25/075 ,  H01L33/62 ,  H01L33/42

Abstract: A light emitting device including a first LED stack, a second LED stack, and a third LED stack each including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, a first planarization layer between the second bonding layer and the second LED stack, a second planarization layer disposed on the first LED stack, lower buried vias passing through the first planarization layer, the second LED stack, and the first bonding layer and electrically connected to the semiconductor layers of the third LED stack, respectively, and upper buried vias passing through the second planarization layer and the first LED stack, in which a width of an upper end of each of the lower buried vias and the upper buried vias is greater than a width of a corresponding through hole.