Semiconductor Device and Method of Forming Discrete Antenna Modules

    公开(公告)号:US20220148983A1

    公开(公告)日:2022-05-12

    申请号:US17092449

    申请日:2020-11-09

    Abstract: A semiconductor device has an electronic component assembly, and a plurality of discrete antenna modules disposed over the electronic component assembly. Each discrete antenna module is capable of providing RF communication for the electronic component assembly. RF communication can be enabled for a first one of the discrete antenna modules, while RF communication is disabled for a second one of the discrete antenna modules. Alternatively, RF communication is enabled for the second one of the discrete antenna modules, while RF communication is disabled for the first one of the discrete antenna modules. A bump is formed over the discrete antenna modules. An encapsulant is deposited around the discrete antenna modules. A shielding layer is formed over the electronic components assembly. A stud or core ball can be formed internal to a bump connecting the discrete antenna modules to the electronic component assembly.

    Semiconductor Device and Method of Forming Embedded Die Substrate, and System-in-Package Modules with the Same

    公开(公告)号:US20190088621A1

    公开(公告)日:2019-03-21

    申请号:US15706584

    申请日:2017-09-15

    Abstract: A semiconductor device has a first substrate. A first semiconductor component is disposed on a first surface of the first substrate. A second substrate includes a vertical interconnect structure on a first surface of the second substrate. A second semiconductor component is disposed on the first surface of the second substrate. The first semiconductor component or second semiconductor component is a semiconductor package. The first substrate is disposed over the second substrate with the first semiconductor component and second semiconductor component between the first substrate and second substrate. A first encapsulant is deposited between the first substrate and second substrate. A SiP submodule is disposed over the first substrate or second substrate opposite the encapsulant. A shielding layer is formed over the SiP submodule.

    Double-Sided Partial Molded SIP Module

    公开(公告)号:US20230074430A1

    公开(公告)日:2023-03-09

    申请号:US17447029

    申请日:2021-09-07

    Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.

Patent Agency Ranking