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公开(公告)号：US20170129773A1
公开(公告)日：2017-05-11
申请号：US15410394
申请日：2017-01-19
Applicant: STMICROELECTRONICS S.R.L.
CPC classification number: B81B7/008 , B81B3/00 , B81B7/04 , B81B2201/0257 , B81B2207/03 , B81B2207/053 , H04R3/007 , H04R3/12 , H04R19/005 , H04R2201/003
Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
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公开(公告)号：US20250119061A1
公开(公告)日：2025-04-10
申请号：US18989356
申请日：2024-12-20
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alberto CATTANI , Stefano RAMORINI , Alessandro GASPARINI
Abstract: A DC-DC converter circuit includes a switching stage with first and second switches, and a control circuit coupled to the switching stage. The control circuit detects a threshold for changing between a synchronous operation mode and an asynchronous operation mode, synchronizes the detected threshold with a beginning of a new switching cycle, applies feed-forward compensation at the beginning of an ON-time period to vary a duty cycle, and generates drive signals to control the switching stage.
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13.发明申请公开(公告)号：US20210384830A1
公开(公告)日：2021-12-09
申请号：US17335523
申请日：2021-06-01
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alberto CATTANI , Alessandro GASPARINI
Abstract: A control circuit for controlling switching operation of a switching stage of a converter includes a phase detector circuit that generates a pulse-width modulated (PWM) signal in response to a phase comparison of two clock signals. A first clock signal has a frequency determined as a function of a first feedback signal proportional to converter output voltage. A first transconductance amplifier generates a first current indicative of a difference between a reference voltage and the first feedback signal, and a second transconductance amplifier generates a second current indicative of a difference between the reference voltage and a second feedback signal proportional to a derivative of the converter output voltage. A delay line introduces a delay in the first clock signal that is dependent on the first and second currents as well as a compensation current dependent on a selected operational mode of the converter.
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公开(公告)号：US20210184576A1
公开(公告)日：2021-06-17
申请号：US17117847
申请日：2020-12-10
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto CATTANI , Alessandro GASPARINI
Abstract: First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch.
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公开(公告)号：US20210013808A1
公开(公告)日：2021-01-14
申请号：US16924410
申请日：2020-07-09
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto CATTANI , Alessandro GASPARINI
Abstract: First and second FETs of a half-bridge are series connected between first and second terminals and are gate driven, respectively, by first and second drivers. An inductance is connected to the intermediate node of the half-bridge. Power supply for the second driver circuit is a supply voltage generated by a voltage regulator as a function of the voltage between the first and the second terminal. Power supply for the first driver circuit is a supply voltage generated by a bootstrap capacitor having a first terminal connected via a first switch to receive the supply voltage output from the voltage regulator and a second terminal connected to the intermediate node. The first terminal of the bootstrap capacitor is further connected by a second switch to receive a second supply voltage. A control circuit generates control signals for the first and second driver circuits and the first and second switches.
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Patent Agency Ranking
公开(公告)号：US20210006163A1
公开(公告)日：2021-01-07
申请号：US16916335
申请日：2020-06-30
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto CATTANI
Abstract: A first switch couples an input node receiving a main control signal for a main switching stage of a multi-phase converter to an output node delivering a secondary control signal for a secondary switching stage following actuation of the secondary switching stage. A second switch couples the output node to a capacitor during a time period of actuation/deactuation of the secondary switching stage. Current is sourced to the capacitor during the actuation time period or sunk from the capacitor during the deactuation time period. The sourced or sunk current may be generated proportional to the main control signal.
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17.发明申请公开(公告)号：US20160268887A1
公开(公告)日：2016-09-15
申请号：US15163394
申请日：2016-05-24
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Stefano RAMORINI , Alessandro GASPARINI , Alberto CATTANI
Abstract: An electrical-energy harvesting system envisages a transducer for converting energy from an environmental energy source into a transduced signal, an electrical energy harvesting interface for receiving the transduced signal and for supplying a harvesting signal, and an energy storage element coupled to the electrical energy harvesting interface for receiving the harvesting signal. The electrical-energy harvesting system also includes a voltage converter connected to the electrical energy harvesting interface for generating a regulated voltage. The harvesting interface samples an open-circuit voltage value of the transduced signal, generates an optimized voltage value starting from the open-circuit voltage value, and generates an upper threshold voltage and a lower threshold voltage on the basis of the optimized voltage value. The harvesting interface controls the voltage converter in switching mode so that the harvesting signal has a value between the upper and lower threshold voltages in at least one operating condition.
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公开(公告)号：US20240348249A1
公开(公告)日：2024-10-17
申请号：US18630493
申请日：2024-04-09
Applicant: STMicroelectronics S.r.l.
Inventor： Francesco PINZIN , Alessandro BERTOLINI , Alberto CATTANI
IPC: H03K17/687 , H02M1/088 , H02M3/157 , H02M3/158
CPC classification number: H03K17/6871 , H02M1/088 , H02M3/157 , H02M3/158
Abstract: A power MOSFET driver circuit includes a feedback circuit configured to supply a feedback signal that signals when a gate voltage of the power MOSFET crosses a plateau value and the power MOSFET switches conduction state. The feedback circuit includes a comparator with a replica MOSFET of the power MOSFET, with scaled down dimensions, whose gate is coupled to the gate electrode of the power MOSFET. A bistable circuit has an input coupled to an output of the replica MOSFET and is configured to change a logic state of the feedback signal following the transition of the switching signal when the gate voltage of the power MOSFET crosses the plateau value and the power MOSFET switches conduction state.
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公开(公告)号：US20240120838A1
公开(公告)日：2024-04-11
申请号：US18376328
申请日：2023-10-03
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alberto CATTANI , Alessandro GASPARINI
CPC classification number: H02M3/158 , H02M1/0035
Abstract: In a DC-DC converter, a duty-cycle control signal is generated in response to comparing the switching stage output voltage and a reference voltage signal. A first circuit compares the duty-cycle control signal and a ramp to produce a PWM signal. A second circuit compares the duty-cycle control signal and a skip threshold to produce a skip control signal which halts switching operation of the switching stage. A count is made of number of periods of the skip control signal during a monitoring time window and the number of periods of a clock signal during a period of the skip control signal is counted. When the counted number of skip control signal periods is within a first range and the counted number of clock signal periods is within a second range, a common detection signal is asserted to trigger varying a value of the skip threshold signal.
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20.发明公开公开(公告)号：US20240006994A1
公开(公告)日：2024-01-04
申请号：US18214646
申请日：2023-06-27
Applicant: STMicroelectronics S.r.l.
Inventor： Tommaso ROSA , Alessandro BERTOLINI , Stefano RAMORINI , Alberto CATTANI
IPC: H02M3/158
CPC classification number: H02M3/158
Abstract: A DC-DC boost converter includes an input receiving an input voltage and an output producing an output voltage. A switching stage is formed by a low-side transistor arranged between a switching node and a ground node, and a high-side transistor arranged between the switching node and the output. The high-side transistor includes a body diode having an anode coupled to the switching node and a cathode coupled to the output. The converter is controlled in an asynchronous operation mode where the low-side transistor is driven alternately to a conductive state and a non-conductive state, and the high-side transistor is driven steadily to a non-conductive state. A variable load circuit is selectively coupled between the two output terminals when the converter is in the asynchronous operation mode in order to sink a load current having a value that is a function of a value of the input voltage.
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