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公开(公告)号:US20200259475A1
公开(公告)日:2020-08-13
申请号:US16785831
申请日:2020-02-10
Applicant: STMicroelectronics S.r.l.
Inventor: Germano NICOLLINI
IPC: H03F3/45
Abstract: A high-to-low voltage interface circuit includes a differential circuit stage with a differential amplifier circuit having inverting and non-inverting inputs coupled to first and second input pads as well as a differential output having first and second output nodes. A pair of bias amplifier stages sensitive to the common mode voltage of the differential amplifier circuit are arranged in first and second current mirror paths from the first and second input pads to the inverting/non-inverting inputs of the differential amplifier circuit, respectively. The bias amplifier stages are configured to maintain the first input pad and the second input pad of the differential circuit stage at the common mode voltage.
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公开(公告)号:US20190372535A1
公开(公告)日:2019-12-05
申请号:US16539478
申请日:2019-08-13
Applicant: STMicroelectronics S.r.l.
Inventor: Stefano RAMORINI , Alberto CATTANI , Germano NICOLLINI , Alessandro GASPARINI
Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
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公开(公告)号:US20180337647A1
公开(公告)日:2018-11-22
申请号:US15982548
申请日:2018-05-17
Applicant: STMicroelectronics S.r.l.
Inventor: Stefano RAMORINI , Alberto CATTANI , Alessandro GASPARINI , Germano NICOLLINI
CPC classification number: H03F3/45192 , H03F2200/18 , H03M1/124 , H03M1/66 , H03M1/68 , H03M1/742 , H03M1/765
Abstract: A circuit includes an input transistor pair with first and second input transistors, the first input transistor having a control terminal configured to receive an input signal and a cascode transistor pair including a first and second cascode transistors having a common control node. A bias circuit has a bias input configured to receive the input signal and a first bias output coupled to the common node of the first and second cascode transistors. The bias circuit includes a signal tracking circuit operating to generate the first bias output to track the input signal. A pair of load transistors are coupled to the input transistor pair and biased by a second bias output of the bias circuit.
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14.
公开(公告)号:US20170187335A1
公开(公告)日:2017-06-29
申请号:US15156172
申请日:2016-05-16
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Germano NICOLLINI , Marco GARBARINO
CPC classification number: H03F1/34 , G01C19/56 , G01C19/5776 , H03F1/303 , H03F3/45071 , H03F3/45475 , H03F3/70 , H03F2200/144 , H03F2200/336 , H03F2203/45044 , H03F2203/45112 , H03F2203/45514 , H03F2203/45526 , H03F2203/45528 , H03F2203/45534 , H03F2203/45536 , H03K5/1536 , H03K17/22
Abstract: An electronic circuit for amplifying signals with two components in phase quadrature, which includes: a feedback amplifier with a feedback capacitor; a switch that drives charging and discharging of the feedback capacitor; an additional capacitor; and a coupling circuit, which alternatively connects the additional capacitor in parallel to the feedback capacitor or else decouples the additional capacitor from the feedback capacitor. The switch opens at a first instant, where a first one of the two components assumes a first zero value; the coupling circuit decouples the additional capacitor from the feedback capacitor in a way synchronous with a second instant, where the first component assumes a second zero value.
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公开(公告)号:US20170170795A1
公开(公告)日:2017-06-15
申请号:US15156155
申请日:2016-05-16
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Marco GARBARINO , Roberto MODAFFARI , Germano NICOLLINI
IPC: H03F3/45
CPC classification number: H03F3/45179 , H03F3/3027 , H03F3/45183 , H03F3/45475 , H03F3/45659 , H03F2200/129 , H03F2203/45008 , H03F2203/45112 , H03F2203/45134 , H03F2203/45418 , H03F2203/45601
Abstract: An amplifier includes a first input branch and a second input branch that form a differential input stage and a current mirror connected to the differential input. The current mirror is governed as a function of a common mode feedback signal applied to a control node of the current mirror. A second, amplification, stage includes a branch flowing through which is a current, which is a function of the current that flows in the first input branch, and is in turn connected to a first output branch. A capacitive element is coupled between the control node and the second stage. The circuit is symmetrical with respect to the input stage.
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