Abstract:
A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.
Abstract:
A display device is provided. The display device includes a substrate, a first active layer of a first transistor and a second active layer of a second transistor which are disposed on the substrate, a first gate insulating layer disposed on the first active layer, an oxide layer disposed on the first gate insulating layer and including an oxide semiconductor, a first gate electrode disposed on the oxide layer, a second gate insulating layer disposed on the first gate electrode and the second active layer, and a second gate electrode which overlaps the second active layer in a thickness direction of the substrate and is disposed on the second gate insulating layer, where the oxide layer overlaps the first active layer and does not overlap the second active layer in the thickness direction.
Abstract:
A conductive pattern for a display device includes a first layer including aluminum or an aluminum alloy disposed on a substrate and forming a first taper angle with the substrate, and a second layer disposed on the first layer forming a second taper angle with the first layer, in which the second taper angle is smaller than the first taper angle.
Abstract:
Provided are a sputtering device and a method of forming a layer using the same.The method of forming a layer using the sputtering device includes: placing a substrate within a chamber; depositing target particles emitted from a target, which faces the substrate, on the substrate using a sputtering process; and horizontally moving a plurality of shield rods, which are installed in a shield mask disposed between the substrate and the target and are separated from each other along a first direction, during the sputtering process.
Abstract:
A display device includes: a substrate; a first active layer of a first transistor and a second active layer of a second transistor on the substrate; a first gate insulating layer on the first active layer; a first gate electrode on the first gate insulating layer; a second gate insulating layer on the second active layer; and a second gate electrode on the second gate insulating layer, wherein a hydrogen concentration of the first gate insulating layer is lower than a hydrogen concentration of the second gate insulating layer.
Abstract:
A display device and a method for fabricating the same are provided. The display device comprises pixels connected to scan lines, and to data lines crossing the scan lines, each of the pixels including a light emitting element, and a first transistor configured to control a driving current supplied to the light emitting element according to a data voltage applied from the data line, the first transistor including a first active layer having an oxide semiconductor, and a first oxide layer on the first active layer and having a crystalline oxide containing tin (Sn).
Abstract:
Provided is a metal wire. The metal wire includes a copper layer, and at least one barrier layer. The barrier layer is disposed on at least one of an upper part and a lower part of the copper layer. The barrier layer includes an alloy including copper, nickel, and zinc.
Abstract:
A thin film transistor array panel includes a substrate and a gate line disposed on the substrate. The gate line includes a gate electrode. A gate insulating layer is disposed on the gate line. An oxide semiconductor layer is disposed on the gate insulating layer. The oxide semiconductor layer at least partially overlaps the gate electrode. A data line is disposed on the oxide semiconductor layer. The data line includes a source electrode and a drain electrode facing the source electrode. The oxide semiconductor layer includes tungsten, indium, zinc, or tin.
Abstract:
A thin film transistor array panel that includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate; a gate insulating layer disposed between the gate electrode and the semiconductor layer; a source electrode disposed on the semiconductor layer and a drain electrode facing the source electrode; a metal oxide layer covering the source electrode and the drain electrode; and a passivation layer covering the source electrode, the drain electrode, and the metal oxide layer, wherein the source electrode and the drain electrode include a first material and a second material which is added to the first material and metal included in the metal oxide layer is formed by diffusing the second material.
Abstract:
An oxide sputtering target includes at least one of indium (In), zinc (Zn), tin (Sn), and gallium (Ga), and tungsten (W) in an amount from 0.005 mol % to 1 mol %.