MEMORY CONTROLLER AND STORAGE DEVICE EACH USING FRAGMENTATION RATIO, AND OPERATING METHOD THEREOF

    公开(公告)号:US20220206938A1

    公开(公告)日:2022-06-30

    申请号:US17455232

    申请日:2021-11-17

    Abstract: An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.

    POWER SAVE FOR AUDIO/VIDEO TRANSMISSIONS OVER WIRED INTERFACE
    13.
    发明申请
    POWER SAVE FOR AUDIO/VIDEO TRANSMISSIONS OVER WIRED INTERFACE 审中-公开
    通过有线接口进行音频/视频传输的省电功能

    公开(公告)号:US20140293135A1

    公开(公告)日:2014-10-02

    申请号:US14231540

    申请日:2014-03-31

    Abstract: A method and system for providing power saving for wired connected devices. The method includes determining a power saving mode by one or more of a first communication device and a second communication device based on one or more of a video content state and one or more un-allocated communication paths. A power saving operation is performed while using a wired link between the first communication device and the second communication device based on the determined power saving mode.

    Abstract translation: 一种用于为有线连接设备提供省电的方法和系统。 该方法包括基于视频内容状态和一个或多个未分配通信路径中的一个或多个来确定第一通信设备和第二通信设备中的一个或多个的功率节省模式。 基于所确定的省电模式,在使用第一通信设备和第二通信设备之间的有线链路的同时执行省电操作。

    Method, memory controller and storage device to perform garbage collection based on fragmentation ratio of blocks

    公开(公告)号:US11698855B2

    公开(公告)日:2023-07-11

    申请号:US17455232

    申请日:2021-11-17

    CPC classification number: G06F12/0246 G06F2212/7205

    Abstract: An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.

    Battery and electronic device having the same

    公开(公告)号:US11133546B2

    公开(公告)日:2021-09-28

    申请号:US16226841

    申请日:2018-12-20

    Abstract: An electronic device and battery included therein are disclosed. The device includes a battery which itself comprises a jelly-roll structure having a rolled stack of a cathode, a separator, and an anode; an outer cover layer enclosing surfaces of the jelly-roll; and a pouch sealing the jelly-roll and the outer cover layer. The jelly-roll includes a first surface, a second surface disposed in a opposite direction, a third surface corresponding to one side of the rolled stack and connecting the first surface and the second surface, and a fourth surface corresponding to other side of the rolled stack, connecting the first surface and the second surface, and disposed in a direction opposite to the third surface. The outer cover layer includes a first portion, a second portion, a third portion, and a fourth portion bonded to first, second, third and fourth surfaces, respectively.

    COOLING SYSTEM FOR SEMICONDUCTOR EQUIPMENT

    公开(公告)号:US20250132185A1

    公开(公告)日:2025-04-24

    申请号:US18825121

    申请日:2024-09-05

    Abstract: A cooling system for semiconductor equipment includes a chamber, an electrostatic chuck in the chamber, a coolant pipe housing in at least one of the chamber and the electrostatic chuck, the coolant pipe housing having an internal space, a coolant pipe at least partially in the internal space of the coolant pipe housing, and a flow controller configured to control a flow velocity of the coolant flowing along the coolant pipe so that the flow velocity periodically reaches a highest speed and a lowest speed.

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