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公开(公告)号:US20240311027A1
公开(公告)日:2024-09-19
申请号:US18480919
申请日:2023-10-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jonghwa Kim
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0607 , G06F3/0652 , G06F3/0679
Abstract: A storage device includes: a non-volatile memory configured to include a plurality of blocks having a plurality of word lines and to write data to the blocks or to erase data of the blocks; and a splitter configured to obtain write times for a plurality of word lines of a first block of the blocks while the non-volatile memory writes data in the first block, and to command the non-volatile memory to perform an erase operation on a second block of the blocks by the reference time when a write time for one of the word lines is shorter than the reference time.
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公开(公告)号:US12068766B2
公开(公告)日:2024-08-20
申请号:US18075049
申请日:2022-12-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seunghwan Yoon , Dongsik Shin , Dongjoo Kim , Danbi Jeon , Jongwook Zeong , Dabin Choi , Bonmin Koo , Jonghwa Kim , Jihye Kim , Haegweon Park
IPC: H04B1/04 , H03H9/02 , H03H9/10 , H03H9/54 , H04B7/0404 , H04B7/0413
CPC classification number: H04B1/04 , H03H9/02086 , H03H9/105 , H03H9/542 , H04B7/0404 , H04B7/0413
Abstract: The present disclosure relates to an electronic device for radiating an output signal in a wireless communication system. In one embodiment, the electronic device includes: a power amplifier configure to receive an input signal; a splitter connected to the power amplifier, which a plurality of branches; a plurality of filters connected to the plurality of branches of the splitter; and a plurality of antenna elements connected to the plurality of filters. The plurality of antenna elements radiates the output signal that is a portion of the input signal received by the power amplifier.
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3.
公开(公告)号:US20230333979A1
公开(公告)日:2023-10-19
申请号:US18330936
申请日:2023-06-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongeun Shin , Jonghwa Kim , Alain Tran
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7205
Abstract: An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.
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公开(公告)号:US11194655B2
公开(公告)日:2021-12-07
申请号:US16775587
申请日:2020-01-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jihwan Kim , Inyoung Kim , Jonghwa Kim , Chanik Park
Abstract: A storage device includes a non-volatile memory including a plurality of memory blocks and a storage controller configured to control a read operation of the non-volatile memory. The storage controller receives power-off time information indicating a power-off time point at which the storage device is powered off, and power-on time information indicating a power-on time point at which the storage device is powered on, when the storage device is switched from a power-off state to a power-on state. The storage controller stores a power-off time stamp corresponding to the power-off time point and a power-on time stamp corresponding to the power-on time point in the non-volatile memory.
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公开(公告)号:US11127983B2
公开(公告)日:2021-09-21
申请号:US16282455
申请日:2019-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunmi Cheong , Jonghwa Kim , Younghoon Lee , Daehyuk Chin
IPC: H01M10/0587 , H01M10/04 , H04M1/02 , H04B1/3883 , H04B1/3888 , H01M50/116 , H01M50/124 , H01M50/543
Abstract: In one embodiment of the disclosure an electronic device comprising: a display; a first plate having opposing first and second faces, wherein the display is disposed on the first face; a second plate coupled to the second face of the first plate, at least one adhesive layer including a first adhesive layer adhering to the second face of the first plate, a jelly-roll, a roll fixing tape disposed on one region of the jelly-roll, a pouch containing the jelly-roll and the roll fixing tape, wherein the at least one adhesive layer including the first adhesive layer is disposed between and attached to one face of the pouch, and wherein one end of the first adhesive layer and one end of the roll fixing tape face are in the same direction while the first adhesive layer and the roll fixing tape vertically surround the one face of the pouch.
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6.
公开(公告)号:US20240321366A1
公开(公告)日:2024-09-26
申请号:US18734833
申请日:2024-06-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kun-Woo Song , Jonghwa Kim , Kyungyong Jeoung
CPC classification number: G11C16/3431 , G11C16/0483 , G11C16/34 , G11C16/10 , G11C16/26 , H10B43/27
Abstract: Disclosed is a storage device, which includes a nonvolatile memory device including a first memory block connected with a plurality of first word lines, and a memory controller connected with the nonvolatile memory device through a plurality of data lines. The memory controller sends a first command to the nonvolatile memory device through the plurality of data lines during a first command input period, sends a parameter to the nonvolatile memory device through the plurality of data lines during an address input period, and sends a second command to the nonvolatile memory device through the plurality of data lines during a second command input period. The nonvolatile memory device applies a turn-on voltage to all the plurality of first word lines connected with the first memory block based on the parameter during a first time in response to the first command and the second command.
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7.
公开(公告)号:US11651805B2
公开(公告)日:2023-05-16
申请号:US17243870
申请日:2021-04-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ji-Yeon Shin , Daehoon Na , Jonghwa Kim
IPC: G11C7/00 , G11C7/22 , H01L25/065 , H01L25/10 , H01L25/18
CPC classification number: G11C7/22 , H01L25/0652 , H01L25/105 , H01L25/18 , H01L2225/06506 , H01L2225/06562 , H01L2225/06586
Abstract: A memory package includes; a first memory chip including first memory pads, and a buffer chip including first buffer pads respectively connected with the first memory pads and second buffer pads connected with an external device. The buffer chip respectively communicates signals received via the second buffer pads to the first buffer pads in response to a swap enable signal having a disabled state, and the buffer chip swaps signals received via the second buffer pads to generate first swapped signals, and respectively communicates the first swapped signals to the first buffer pads in response to the swap enable signal having an enabled state.
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公开(公告)号:US10854938B2
公开(公告)日:2020-12-01
申请号:US16116225
申请日:2018-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Young-Jong Kim , Dongsik Shin , Jonghwa Kim , Hae-Gweon Park , Byungtae Yoon , Jong Wook Zeong , Soon-Ho Hwang
Abstract: A phase shifter is disclosed and includes a first substrate comprising a phase change line; and a second substrate comprising an input line connected to an input port, a first output line connected to a first output port, a second output line connected to a second output port, and a connection line connecting the first output line and the second output line. The first substrate is disposed to face the second substrate and to be overlaid at a predetermined distance from the second substrate. A phase of a signal passing through a first portion of the phase change line changes by a first value according to a movement of the first substrate. The signal is branched into a first signal to be transmitted to the first output port and a second signal to be transmitted to the second output port.
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9.
公开(公告)号:US12057191B1
公开(公告)日:2024-08-06
申请号:US18133247
申请日:2023-04-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ji-Yeon Shin , Daehoon Na , Jonghwa Kim
IPC: G11C7/10 , G11C7/22 , H01L25/065 , H01L25/10 , H01L25/18
CPC classification number: G11C7/22 , H01L25/0652 , H01L25/105 , H01L25/18 , H01L2225/06506 , H01L2225/06562 , H01L2225/06586
Abstract: A memory package includes; a first memory chip including first memory pads, and a buffer chip including first buffer pads respectively connected with the first memory pads and second buffer pads connected with an external device. The buffer chip respectively communicates signals received via the second buffer pads to the first buffer pads in response to a swap enable signal having a disabled state, and the buffer chip swaps signals received via the second buffer pads to generate first swapped signals, and respectively communicates the first swapped signals to the first buffer pads in response to the swap enable signal having an enabled state.
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公开(公告)号:US11698855B2
公开(公告)日:2023-07-11
申请号:US17455232
申请日:2021-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongeun Shin , Jonghwa Kim , Alain Tran
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7205
Abstract: An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.
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