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11.发明申请公开(公告)号：US20180322923A1
公开(公告)日：2018-11-08
申请号：US16037190
申请日：2018-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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12.发明申请公开(公告)号：US20170271013A1
公开(公告)日：2017-09-21
申请号：US15609761
申请日：2017-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , KITAE PARK
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/3427
Abstract: A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.
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13.发明申请公开(公告)号：US20160314840A1
公开(公告)日：2016-10-27
申请号：US15203826
申请日：2016-07-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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公开(公告)号：US20150003167A1
公开(公告)日：2015-01-01
申请号：US14223368
申请日：2014-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： YOON-HEE CHOI , SANG-WAN NAM
CPC classification number: G11C16/10 , G11C16/0483 , G11C16/24 , G11C16/3459
Abstract: A method of programming a memory cell of a nonvolatile memory device by executing a plurality of program loops comprises detecting whether a loop count or a level of a program pulse to be applied to the memory cell is within a specific range, wherein the specific range is an operation section in which a level of a current peak flowing into the bitline increases up to a reference value or more, charging a bitline of the memory cell at a first charging speed or a second charging speed slower than the first charging speed according to a result of the detection, and applying the program pulse to a wordline of the memory cell.
Abstract translation: 通过执行多个程序循环来对非易失性存储器件的存储单元进行编程的方法包括检测要应用于存储单元的循环计数或编程脉冲的电平是否在特定范围内，其中特定范围为 其中流入位线的电流峰值的电平增加到参考值或更大的操作部分，根据第一充电速度以比第一充电速度慢的第一充电速度或第二充电速度对存储器单元的位线进行充电 检测结果，并将编程脉冲施加到存储单元的字线。
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公开(公告)号：US20220059168A1
公开(公告)日：2022-02-24
申请号：US17408921
申请日：2021-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： JUN-HO SEO , YONG-LAE KIM , HANEOL JANG , HYUKJE KWON , SANG-WAN NAM
Abstract: A nonvolatile memory device includes a memory block including a first structure formed on a substrate and a second structure formed on the first structure. An erase method of the nonvolatile memory device includes applying a word line erase voltage to first normal word lines of the first structure and second normal word lines of the second structure, and applying a junction word line erase voltage smaller than the word line erase voltage to at least one of a first junction word line of the first structure and a second junction word line of the second structure. The first junction word line is a word line adjacent to the second structure from among word lines of the first structure, and the second junction word line is a word line adjacent to the first structure from among word lines of the second structure.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20180268903A1
公开(公告)日：2018-09-20
申请号：US15978230
申请日：2018-05-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , KITAE PARK
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/3427
Abstract: A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.
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17.发明申请公开(公告)号：US20180047448A1
公开(公告)日：2018-02-15
申请号：US15790257
申请日：2017-10-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG
CPC classification number: G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26 , G11C16/3427
Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
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公开(公告)号：US20170117048A1
公开(公告)日：2017-04-27
申请号：US15398594
申请日：2017-01-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： YOON-HEE CHOI , SANG-WAN NAM , KANG-BIN LEE
CPC classification number: G11C16/10 , G11C7/04 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/30 , G11C16/3459
Abstract: In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a programming step for programming selected memory cells among the memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In the programming the selected memory cells, a level of a voltage being applied to a common source line connected to the strings in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.
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公开(公告)号：US20160358660A1
公开(公告)日：2016-12-08
申请号：US15238740
申请日：2016-08-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SANG-WAN NAM , WON-TAECK JUNG , JUNGHOON PARK
CPC classification number: G11C16/14 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/16 , G11C16/3418 , G11C16/344 , G11C16/3445 , H01L27/115
Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
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20.发明申请NONVOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开非易失性存储器件，其操作方法和包括其的存储器系统公开(公告)号：US20160118133A1
公开(公告)日：2016-04-28
申请号：US14811380
申请日：2015-07-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： CHI WEON YOON , DONGHYUK CHAE , JAE-WOO PARK , SANG-WAN NAM
CPC classification number: G11C16/3445 , G11C16/0483 , G11C16/06 , G11C16/16 , H01L29/792
Abstract: A method of operating a non-volatile memory device includes performing an erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associated with the plurality of SSLs constituting a memory block, and verifying the erasing operation to second memory cells associated with a second SSL after verifying the erasing operation to first memory cells associated with a first SSL.
Abstract translation: 操作非易失性存储器件的方法包括对与多个串选择线（SSL）相关联的存储器单元执行擦除操作，与构成存储块的多个SSL相关联的存储器单元，以及将擦除操作 在对与第一SSL相关联的第一存储器单元进行擦除操作之后，与第二SSL相关联的第二存储器单元。
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