公开(公告)号：US20160343443A1

公开(公告)日：2016-11-24

申请号：US15229158

申请日：2016-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOON-HEE CHOI ,  SANG-WAN NAM ,  KANG-BIN LEE

IPC: G11C16/10 ,  G11C11/56 ,  G11C16/34 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C7/04 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/30 ,  G11C16/3459

Abstract: In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a programming step for programming selected memory cells among the memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In the programming the selected memory cells, a level of a voltage being applied to a common source line connected to the strings in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.

公开(公告)号：US20150310923A1

公开(公告)日：2015-10-29

申请号：US14790572

申请日：2015-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WAN NAM ,  KANG-BIN LEE ,  JUNGHOON PARK

IPC: G11C16/26 ,  G11C16/12 ,  G11C16/04 ,  G11C16/34

CPC classification number: G11C16/26 ,  G11C16/0483 ,  G11C16/12 ,  G11C16/16 ,  G11C16/34 ,  G11C16/3459 ,  H01L27/1157 ,  H01L27/11582

Abstract: An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.

Abstract translation: 一种非易失性存储器的操作方法，包括多个单元串，具有多个存储单元的每个单元串和堆叠在基板上的串选择晶体管，包括检测多个单元串中的串选择晶体管的阈值电压 ; 根据检测到的阈值电压调整提供给串选择晶体管的电压; 以及将调整后的电压施加到串选择晶体管，以在编程操作期间选择或取消选择多个单元串。

公开(公告)号：US20240321361A1

公开(公告)日：2024-09-26

申请号：US18732377

申请日：2024-06-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-MIN JOE ,  KANG-BIN LEE

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H10B41/27 ,  H10B43/27

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  H01L24/05 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H10B41/27 ,  H10B43/27 ,  H01L2224/05147 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A memory device includes a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first and second metal pads, a memory cell array in the memory cell region including cell strings including memory cells, word lines respectively connected to the memory cells, bit lines connected to one side of the cell strings, and a ground selection line connected to the cell strings, a control logic in the peripheral circuit region including a precharge control circuit for controlling precharge on partial cell strings among the cell strings and controlling a plurality of data program steps on the memory cells, and a row decoder in the peripheral circuit region for activating at least some of the word lines in response to a control of the control logic.

公开(公告)号：US20200219569A1

公开(公告)日：2020-07-09

申请号：US16822905

申请日：2020-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KANG-BIN LEE ,  IL-HAN PARK ,  JONG-HOO JO

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/26 ,  G11C16/34

Abstract: In a method of programming in a nonvolatile memory device, channels of a plurality of cell strings are precharged through ground selection transistors by a precharge voltage of a source line. A turn-on voltage is applied to a selected ground selection transistor of a selected cell string among the plurality of cell strings, during a verification read period of an N-th program loop. The turn-on voltage applied to the selected ground selection transistor is maintained to precharge the channels for an (N+1)-th program loop, without recovery after the verification read period of the N-th program loop is finished. Power consumption is reduced and an operation speed is increased by maintaining the turn-on voltage of the selected ground selection line to precharge the channels of the cell strings without recovery after the verification read operation is finished.

公开(公告)号：US20220068394A1

公开(公告)日：2022-03-03

申请号：US17524099

申请日：2021-11-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-MIN JOE ,  KANG-BIN LEE

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

Abstract: A memory device includes a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first and second metal pads, a memory cell array in the memory cell region including cell strings including memory cells, word lines respectively connected to the memory cells, bit lines connected to one side of the cell strings, and a ground selection line connected to the cell strings, a control logic in the peripheral circuit region including a precharge control circuit for controlling precharge on partial cell strings among the cell strings and controlling a plurality of data program steps on the memory cells, and a row decoder in the peripheral circuit region for activating at least some of the word lines in response to a control of the control logic.

公开(公告)号：US20220020434A1

公开(公告)日：2022-01-20

申请号：US17489988

申请日：2021-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YONGHYUK CHOI ,  JAE-DUK YU ,  KANG-BIN LEE ,  SANG-WON SHIM ,  BONGSOON LIM

IPC: G11C16/10 ,  G11C16/08 ,  G11C16/34 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  G11C16/04 ,  H01L27/11582 ,  H01L27/11556

Abstract: Each of memory blocks of a nonvolatile memory device includes a memory cell region including first metal pads, first memory cells of a first portion of pillar, and second memory cells of a second portion of the pillar, and a peripheral circuit region including second metal pads, a row decoder, and a page buffer. When performing program operations based on consecutive addresses at a memory block selected from the memory blocks, the nonvolatile memory device sequentially completes first program operations of non-adjacent memory cells not adjacent to a boundary of the first portion and the second portion from among the first and second memory cells and then completes a second program operation of an adjacent memory cell adjacent to the boundary. The peripheral circuit region is vertically connected to the memory cell region by the first metal pads and the second metal pads directly.

公开(公告)号：US20170117048A1

公开(公告)日：2017-04-27

申请号：US15398594

申请日：2017-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOON-HEE CHOI ,  SANG-WAN NAM ,  KANG-BIN LEE

IPC: G11C16/10 ,  G11C16/16 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C7/04 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/30 ,  G11C16/3459

Abstract: In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a programming step for programming selected memory cells among the memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In the programming the selected memory cells, a level of a voltage being applied to a common source line connected to the strings in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.