Abstract:
A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information.
Abstract:
A method of transceiving data over an on-chip network includes determining whether a packet is received by a first router among a plurality of first routers constituting a ring network; determining a transmission destination of the packet received by the first router; and transmitting the packet to a second router among a plurality of second routers constituting a bus network connected to the first router in response to the determined transmission destination being located on the bus network connected to the first router.
Abstract:
A tile-based rendering method includes performing binning of a current frame; generating an identification code of binning information or property information of a tile to be rendered in the current frame; comparing the identification code of the tile to be rendered to an identification code of a previous tile, wherein a location of the previous tile in a previous frame is the same as a location of the tile to be rendered in the current frame; and rendering the current frame by either re-using an image stored in a frame buffer or performing pixel processing of the tile to be rendered depending on a result of the comparing.
Abstract:
A curve rendering method includes calculating a step size based on a length of a straight line connecting a start point and an end point among control points of a curve to be rendered, and calculating initial values of a forward differencing algorithm (FDA) based on the calculated step size and coefficient values of an equation of the curve that is determined based on the control points. The method further includes generating an FDA table based on the initial values, and calculating a coordinate value of a pixel based on the FDA table.
Abstract:
A method and device for processing graphics data include generating primitives including objects in an image, classifying tiles dividing the image into scalable tile groups, generating a coverage pattern identifying primitives that are covered on tiles included in each scalable tile group, generating a bin stream including the coverage pattern corresponding to the each scalable tile groups, and performing rendering for each tile of the tiles using the bin stream.
Abstract:
Provided is a data processing apparatus including: a pipeline including a plurality of stages; and a memory that stores data that is processed in the pipeline.
Abstract:
A method of processing data includes classifying input data into first data and second data, the second data being different from the first data, separately compiling the first data and the second data, and providing the compiled first data and the compiled second data to a first operator and a second operator, respectively, in which the first operator performs an operation different from an operation performed by the second operator.
Abstract:
Provided are a rendering method and a rendering apparatus performing the rendering method. The rendering method includes receiving a request to output a hierarchical depth value stored in a hierarchical depth buffer, outputting the hierarchical depth value from the hierarchical depth buffer, storing the hierarchical depth value, in response to the request, and performing rendering using the stored hierarchical depth value.
Abstract:
A rendering method includes generating mipmap images of some levels with respect to texture and storing the generated mipmap images in a storage, receiving a request for the texture, calculating a level of a mipmap requested for the texture, determining whether the stored mipmap images include the mipmap image of the calculated level, and performing rendering by using at least one of the stored mipmap images, based on a result of the determining.
Abstract:
A cache memory apparatus includes a tag comparator configured to compare upper bits of each of pieces of tag data included in a set indicated by a set address that is received with upper bits of a tag address that is received, compare other bits of each of the pieces of the tag data with other bits of the tag address, and determine whether there is a cache hit or a cache miss based on results of the comparisons, and an update controller configured to, in response to the cache miss being determined, determine, as an update candidate, a piece among pieces of cache data included in the set and corresponding to the pieces of the tag data, based on the result of the comparison of the upper bits of each of the pieces of the tag data and the upper bits of the tag address, and update the update candidate with new data.