公开(公告)号：US20150140733A1

公开(公告)日：2015-05-21

申请号：US14583338

申请日：2014-12-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Naoto YAMADE ,  Junichi KOEZUKA ,  Miki SUZUKI ,  Yuichi SATO

IPC: H01L29/66 ,  H01L21/265

CPC classification number: H01L29/66969 ,  H01L21/265 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/78603 ,  H01L29/7869

Abstract: To provide a semiconductor device including an oxide semiconductor which is capable of having stable electric characteristics and achieving high reliability, by a dehydration or dehydrogenation treatment performed on a base insulating layer provided in contact with an oxide semiconductor layer, the water and hydrogen contents of the base insulating layer can be decreased, and by an oxygen doping treatment subsequently performed, oxygen which can be eliminated together with the water and hydrogen is supplied to the base insulating layer. By formation of the oxide semiconductor layer in contact with the base insulating layer whose water and hydrogen contents are decreased and whose oxygen content is increased, oxygen can be supplied to the oxide semiconductor layer while entry of the water and hydrogen into the oxide semiconductor layer is suppressed.

Abstract translation: 为了提供一种能够具有稳定的电特性并实现高可靠性的氧化物半导体的半导体器件，通过对与氧化物半导体层接触的基底绝缘层进行脱水或脱氢处理， 可以降低基极绝缘层，并且随后进行氧掺杂处理，可以将与水和氢一起消除的氧气供应到基底绝缘层。 通过形成与水和氢含量降低并且氧含量增加的基极绝缘层接触的氧化物半导体层，在水和氢进入氧化物半导体层的过程中可以向氧化物半导体层提供氧气 被压制

公开(公告)号：US20220246765A1

公开(公告)日：2022-08-04

申请号：US17727038

申请日：2022-04-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Katsuaki TOCHIBAYASHI ,  Ryota HODO ,  Kentaro SUGAYA ,  Naoto YAMADE

IPC: H01L29/786 ,  H01L27/108 ,  H01L29/24 ,  H01L29/66

Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.

公开(公告)号：US20210057587A1

公开(公告)日：2021-02-25

申请号：US17006987

申请日：2020-08-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yutaka OKAZAKI ,  Akihisa SHIMOMURA ,  Naoto YAMADE ,  Tomoya TAKESHITA ,  Tetsuhiro TANAKA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/45 ,  H01L29/49 ,  H01L27/12

Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

公开(公告)号：US20180261633A1

公开(公告)日：2018-09-13

申请号：US15911708

申请日：2018-03-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Naoto YAMADE ,  Yuhei SATO ,  Yutaka OKAZAKI ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L21/477 ,  H01L29/786 ,  H01L21/02 ,  H01L21/383 ,  H01L21/44 ,  H01L29/66

CPC classification number: H01L27/1274 ,  H01L21/02565 ,  H01L21/02609 ,  H01L21/02667 ,  H01L21/383 ,  H01L21/44 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.

公开(公告)号：US20170288064A1

公开(公告)日：2017-10-05

申请号：US15628699

申请日：2017-06-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo ITO ,  Daisuke MATSUBAYASHI ,  Masaharu NAGAI ,  Yoshiaki YAMAMOTO ,  Takashi HAMADA ,  Yutaka OKAZAKI ,  Shinya SASAGAWA ,  Motomu KURATA ,  Naoto YAMADE

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/46 ,  H01L29/66 ,  H01L21/425

CPC classification number: H01L29/78693 ,  H01L21/425 ,  H01L21/46 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7782 ,  H01L29/7854 ,  H01L29/7855 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

公开(公告)号：US20160163544A1

公开(公告)日：2016-06-09

申请号：US15046962

申请日：2016-02-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Naoto YAMADE ,  Yuhei SATO ,  Yutaka OKAZAKI ,  Shunpei YAMAZAKI

IPC: H01L21/02 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1274 ,  H01L21/02565 ,  H01L21/02609 ,  H01L21/02667 ,  H01L21/383 ,  H01L21/44 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.

公开(公告)号：US20150255310A1

公开(公告)日：2015-09-10

申请号：US14635324

申请日：2015-03-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Suguru HONDO ,  Naoto YAMADE

IPC: H01L21/425 ,  H01L21/385 ,  H01L21/477 ,  H01L21/465

CPC classification number: H01L21/425 ,  H01L21/465 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a method for manufacturing a semiconductor device with favorable electrical characteristics. The following steps are performed in the following order: forming an oxide semiconductor film over a substrate having a substantially planar surface; selectively etching the oxide semiconductor film to form an oxide semiconductor layer; implanting an oxygen ion on a top surface of the oxide semiconductor layer and a side surface of the oxide semiconductor layer in a cross-section perpendicular to the substantially planar surface in a channel width direction of the oxide semiconductor layer from an angle 0°

Abstract translation: 提供一种具有良好的电气特性的半导体器件的制造方法。 按照以下顺序进行以下步骤：在具有大致平坦表面的基板上形成氧化物半导体膜; 选择性地蚀刻氧化物半导体膜以形成氧化物半导体层; 在氧化物半导体层的沟道宽度方向的垂直于基本上平坦的表面的截面中，角度为0°，将氧离子注入到氧化物半导体层的顶表面和氧化物半导体层的侧表面上 ; <90°; 在所述氧化物半导体层上形成绝缘层，并对所述氧化物半导体层进行热处理以将氧扩散到所述氧化物半导体层中。

公开(公告)号：US20240304728A1

公开(公告)日：2024-09-12

申请号：US18638997

申请日：2024-04-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshihiko TAKEUCHI ,  Naoto YAMADE ,  Yutaka OKAZAKI ,  Sachiaki TEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L27/12 ,  H01L29/792 ,  H10B12/00

CPC classification number: H01L29/78693 ,  H01L21/8234 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/1255 ,  H01L29/792 ,  H10B12/00

Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.

公开(公告)号：US20240128380A1

公开(公告)日：2024-04-18

申请号：US18526315

申请日：2023-12-01

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yutaka OKAZAKI ,  Akihisa SHIMOMURA ,  Naoto YAMADE ,  Tomoya TAKESHITA ,  Tetsuhiro TANAKA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/78648 ,  H01L29/7869

Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

公开(公告)号：US20230299183A1

公开(公告)日：2023-09-21

申请号：US18135793

申请日：2023-04-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Toshihiko TAKEUCHI ,  Naoto YAMADE ,  Hiroshi FUJIKI ,  Tomoaki MORIWAKA ,  Shunsuke KIMURA

IPC: H01L29/66 ,  H01L29/10

CPC classification number: H01L29/66969 ,  H01L29/1054 ,  H01L29/4966

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided.
The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.