中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

22 records (took 0.015 seconds)

    STRUCTURE FOR RADIO FREQUENCY APPLICATIONS
    14.
    发明申请
    STRUCTURE FOR RADIO FREQUENCY APPLICATIONS 有权

    公开(公告)号：US20220368036A1

    公开(公告)日：2022-11-17

    申请号：US17816599

    申请日：2022-08-01

    Applicant: Soitec

    Inventor： Eric Desbonnets ,  Bernard Aspar

    IPC: H01Q23/00 ,  H01L21/762 ,  H01L29/66 ,  H01L29/786 ,  H01Q1/22

    Abstract: A structure for radiofrequency applications includes a high-resistivity support substrate having a front face defining a main plane, a charge-trapping layer disposed on the front face of the support substrate, a first dielectric layer disposed on the charge-trapping layer, an active layer disposed on the first dielectric layer, at least one buried electrode disposed above or in the charge-trapping layer. The buried electrode comprises a conductive layer and a second dielectric layer.

    Structure for radio frequency applications
    15.
    发明授权
    Structure for radio frequency applications 有权

    公开(公告)号：US11043756B2

    公开(公告)日：2021-06-22

    申请号：US16480249

    申请日：2018-01-29

    Applicant: Soitec

    Inventor： Eric Desbonnets ,  Bernard Aspar

    IPC: H01Q23/00 ,  H01L21/762 ,  H01L29/66 ,  H01L29/786 ,  H01Q1/22

    Abstract: A structure for radiofrequency applications includes a high-resistivity support substrate having a front face defining a main plane, a charge-trapping layer disposed on the front face of the support substrate, a first dielectric layer disposed on the charge-trapping layer, an active layer disposed on the first dielectric layer, at least one buried electrode disposed above or in the charge-trapping layer. The buried electrode comprises a conductive layer and a second dielectric layer.

    METHODS OF FORMING SEMICONDUCTOR STRUCTURES INCLUDING MEMS DEVICES AND INTEGRATED CIRCUITS ON OPPOSING SIDES OF SUBSTRATES, AND RELATED STRUCTURES AND DEVICES
    18.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR STRUCTURES INCLUDING MEMS DEVICES AND INTEGRATED CIRCUITS ON OPPOSING SIDES OF SUBSTRATES, AND RELATED STRUCTURES AND DEVICES 有权
    形成包括MEMS器件的半导体结构的方法和基板对准面的集成电路及其相关结构和器件

    公开(公告)号：US20150191344A1

    公开(公告)日：2015-07-09

    申请号：US14416825

    申请日：2013-07-08

    Applicant: Soitec

    Inventor： Mariam Sadaka ,  Bernard Aspar ,  Chrystelle Lagahe Blanchard

    IPC: B81B7/00 ,  B81C1/00

    CPC classification number: B81B7/007 ,  B81B2201/0271 ,  B81B2207/012 ,  B81B2207/015 ,  B81C1/00238 ,  B81C1/00246 ,  B81C1/00301 ,  B81C2203/0735 ,  B81C2203/0792 ,  H01L2224/16 ,  H03H9/10

    Abstract: Methods of forming semiconductor devices comprising integrated circuits and microelectromechanical system (MEMS) devices operatively coupled with the integrated circuits involve the formation of an electrically conductive via extending at least partially through a substrate from a first major surface of the substrate toward an opposing second major surface of the substrate, and the fabrication of at least a portion of an integrated circuit on the first major surface of the substrate. A MEMS device is provided on the second major surface of the substrate, and the MEMS device is operatively coupled with the integrated circuit using the at least one electrically conductive via. Structures and devices are fabricated using such methods.

    Abstract translation: 形成包括集成电路的半导体器件和与集成电路可操作耦合的微机电系统（MEMS）器件的方法包括形成导电通孔，该导电通孔至少部分地穿过衬底，从衬底的第一主表面向相对的第二主表面延伸 的衬底，以及在衬底的第一主表面上制造集成电路的至少一部分。 MEMS器件设置在衬底的第二主表面上，并且MEMS器件使用至少一个导电通孔与集成电路操作耦合。 使用这种方法制造结构和装置。

    Structure for radio frequency applications
    20.
    发明授权
    Structure for radio frequency applications 有权

    公开(公告)号：US11502428B2

    公开(公告)日：2022-11-15

    申请号：US17330237

    申请日：2021-05-25

    Applicant: Soitec

    Inventor： Eric Desbonnets ,  Bernard Aspar

    IPC: H01Q23/00 ,  H01L21/762 ,  H01L29/66 ,  H01L29/786 ,  H01Q1/22

    Abstract: A structure for radiofrequency applications includes a high-resistivity support substrate having a front face defining a main plane, a charge-trapping layer disposed on the front face of the support substrate, a first dielectric layer disposed on the charge-trapping layer, an active layer disposed on the first dielectric layer, at least one buried electrode disposed above or in the charge-trapping layer. The buried electrode comprises a conductive layer and a second dielectric layer.

Patent Agency Ranking