公开(公告)号：US07199745B2

公开(公告)日：2007-04-03

申请号：US11273025

申请日：2005-11-15

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/34

CPC分类号： H03M1/468 ,  H03M1/0682

摘要： A successive approximation A/D converter includes a sample-hold amplifier circuit configured to sample and hold an input analog voltage to produce an internal analog voltage proportional to the input analog voltage with a voltage gain being smaller than 1, a switched capacitor D/A converter coupled to the sample-hold amplifier circuit and including a plurality of capacitors for storing electric charge responsive to the internal analog voltage, the switched capacitor D/A converter configured to switch couplings of the capacitors in response to a control signal to produce a comparison analog voltage responsive to the internal analog voltage and the control signal, a comparator coupled to the switched capacitor D/A converter to produce a comparison result signal responsive to the comparison analog voltage, and a control circuit coupled to the comparator to supply the control signal responsive to the comparison result signal to the switched capacitor D/A converter.

摘要翻译： 逐次逼近A / D转换器包括采样保持放大器电路，其被配置为采样和保持输入模拟电压以产生与输入模拟电压成比例的内部模拟电压，其电压增益小于1，开关电容器D / A 转换器，其耦合到采样保持放大器电路，并且包括用于响应于内部模拟电压存储电荷的多个电容器，所述开关电容器D / A转换器被配置为响应于控制信号来切换电容器的耦合以产生比较 响应于内部模拟电压和控制信号的模拟电压，耦合到开关电容器D / A转换器的比较器，以响应于比较模拟电压产生比较结果信号;以及控制电路，耦合到比较器以提供控制信号 响应于比较结果信号到开关电容器D / A转换器。

公开(公告)号：US07554305B2

公开(公告)日：2009-06-30

申请号：US10985905

申请日：2004-11-12

申请人： Hideo Nunokawa ,  Tatsuo Kato ,  Miki Suzuki ,  Tomonari Morishita

发明人： Hideo Nunokawa ,  Tatsuo Kato ,  Miki Suzuki ,  Tomonari Morishita

IPC分类号： G05F1/56

CPC分类号： G05F1/575

摘要： Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.

摘要翻译： 即使例如，由于诸如来自外部的噪声等外部因素将电荷注入到输出晶体管中，为了防止降压电压上升，降压电路由N沟道型输出晶体管 其控制控制端的电压，升压器，其连接到输出晶体管的控制端并提高控制端的电压，以及放电电路，其在输出晶体管的控制端放电电 从输入端输入的电源电压被降低到期望的降压电压并从输出端输出。

公开(公告)号：US20100156533A1

公开(公告)日：2010-06-24

申请号：US12535184

申请日：2009-08-04

申请人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/347 ,  H03F3/45183 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/45138 ,  H03F2203/45466

摘要： The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.

摘要翻译： 本发明被设计为采用差分对型放大器电路，其包括由接收第一信号的输入的第一晶体管和由第二晶体管构成的差分对，所述第二晶体管接收通过输出第二信号而产生的第三信号的输入， 电压电平是电源电压。 需要匹配的元件是构成放大器电路的差分对的两个晶体管。 因此，不管放大器电路之间的布局如何，需要匹配的元件可以彼此靠近放置。

公开(公告)号：US07236047B2

公开(公告)日：2007-06-26

申请号：US11260176

申请日：2005-10-28

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： G05F1/10

CPC分类号： G05F3/30

摘要： A band gap circuit includes a voltage generating circuit, and a first and a second switched capacitor circuits (SCC). Operational amplifier in the first and the second SCC are connected though a coupling capacitor. Capacitance of the coupling capacitor is smaller than that of a feedback capacitor in the first SCC. A PTAT voltage is obtained by multiplying a thermal voltage by a coefficient determined based on capacitances of input capacitors and feedback capacitors in each of the first and the second SCC, and the coupling capacitor. The voltage generating circuit generates a forward bias voltage that has a negative temperature-dependency at a p-n junction. The PTAT voltage is added to the forward bias voltage to generate a reference voltage independent of temperature.

公开(公告)号：US20070115159A1

公开(公告)日：2007-05-24

申请号：US11363968

申请日：2006-03-01

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/66

CPC分类号： H03M1/1023 ,  H03M1/0682 ,  H03M1/468 ,  H03M1/804

摘要： Included are a first DAC taking in and retaining sample data of a first analog signal and generating a comparison signal serving as an object of comparison with the first analog signal, a second DAC taking in and retaining sample data of a second analog signal and generating a comparison signal as an object of comparison with the second analog signal, a first switch connecting the first digital-to-analog converter to an output side of a second digital converter in a openable/closable manner, a comparator comparing, when the first switch is opened, a differential value between the first analog signal and the second analog signal with a differential value between an output signal of the first DAC and an output signal of the second DAC, and an electric potential control circuit controlling fluctuations in electric potentials of a first analog terminal and a second analog terminal.

摘要翻译： 包括第一DAC接收并保留第一模拟信号的采样数据并产生用作与第一模拟信号进行比较的对象的比较信号，第二DAC接收并保留第二模拟信号的采样数据并产生 比较信号作为与第二模拟信号进行比较的对象，第一开关以第一开关为第一开关为第一开关，将第一数模转换器以可开/关的方式连接到第二数字转换器的输出侧;比较器， 打开第一模拟信号和第二模拟信号之间的差分值，其中第一DAC的输出信号和第二DAC的输出信号之间的差分值和控制第一DAC的电位波动的电位控制电路 模拟端子和第二模拟端子。

公开(公告)号：US20070035434A1

公开(公告)日：2007-02-15

申请号：US11273025

申请日：2005-11-15

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/38

CPC分类号： H03M1/468 ,  H03M1/0682

摘要： A successive approximation. A/D converter includes a sample-hold amplifier circuit configured to sample and hold an input analog voltage to produce an internal analog voltage proportional to the input analog voltage with a voltage gain being smaller than 1, a switched capacitor D/A converter coupled to the sample-hold amplifier circuit and including a plurality of capacitors for storing electric charge responsive to the internal analog voltage, the switched capacitor D/A converter configured to switch couplings of the capacitors in response to a control signal to produce a comparison analog voltage responsive to the internal analog voltage and the control signal, a comparator coupled to the switched capacitor D/A converter to produce a comparison result signal responsive to the comparison analog voltage, and a control circuit coupled to the comparator to supply the control signal responsive to the comparison result signal to the switched capacitor D/A converter.

摘要翻译： 逐渐逼近。 A / D转换器包括采样保持放大器电路，其被配置为采样和保持输入模拟电压以产生与输入模拟电压成比例的内部模拟电压，其电压增益小于1，开关电容器D / A转换器耦合到 所述采样保持放大器电路并且包括用于响应于所述内部模拟电压而存储电荷的多个电容器，所述开关电容器D / A转换器被配置为响应于控制信号来切换所述电容器的耦合，以产生比较模拟电压响应 与所述内部模拟电压和所述控制信号相对应的比较器，耦合到所述开关电容器D / A转换器的比较器，以响应于所述比较模拟电压产生比较结果信号;以及控制电路，耦合到所述比较器以响应于所述控制信号提供所述控制信号 比较结果信号到开关电容器D / A转换器。

公开(公告)号：US20050168293A1

公开(公告)日：2005-08-04

申请号：US10877981

申请日：2004-06-29

申请人： Tatsuo Kato ,  Suguru Tachibana

发明人： Tatsuo Kato ,  Suguru Tachibana

IPC分类号： H03K3/354 ,  G05F3/30 ,  H03K3/03 ,  H03K3/353 ,  H03L7/00

CPC分类号： H03K3/03 ,  G05F3/30 ,  H03K3/353

摘要： An oscillation circuit capable of outputting an oscillation signal of constant frequency free from the influence of source voltage, temperature, and nonuniformity and fluctuation in inverter threshold voltage. An inverter inverts a voltage applied to one end of a capacitive element and outputs the inverted voltage to transistors and an inverter. A constant voltage source outputs a constant voltage free from the influence of source voltage and temperature. The transistors connect the other end of the capacitive element to the constant voltage source or ground in accordance with the voltage output from the first-mentioned inverter. A constant current source causes a constant current free from the influence of the source voltage and temperature to flow into or out of the one end of the capacitive element in accordance with the voltage from the second-mentioned inverter connected to the first-mentioned inverter. Consequently, the voltage at the one end of the capacitive element varies with a fixed amplitude about the threshold voltage of the first-mentioned inverter without being influenced by the source voltage and temperature, and a constant current free from the influence of the source voltage and temperature flows into and out of the one end of the capacitive element to charge and discharge the capacitive element over fixed periods.

摘要翻译： 能够输出恒定频率的振荡信号的振荡电路，不受源电压，温度，逆变器阈值电压的不均匀性和波动的影响。 逆变器将施加到电容元件的一端的电压反相，并将反相电压输出到晶体管和反相器。 恒压源输出不受源电压和温度影响的恒定电压。 晶体管将电容元件的另一端连接到恒压源或接地，根据来自前述逆变器的电压输出。 根据来自连接到第一提到的逆变器的第二提及的逆变器的电压，恒定电流源导致不受源电压和温度的影响的恒定电流流入或流出电容元件的一端。 因此，电容元件一端的电压以不受源电压和温度的影响而以第一提及的逆变器的阈值电压为固定幅度而变化，并且恒定电流不受源极电压和 温度流入和流出电容元件的一端，以在固定周期内对电容元件充电和放电。

公开(公告)号：US20060012354A1

公开(公告)日：2006-01-19

申请号：US10985905

申请日：2004-11-12

申请人： Hideo Nunokawa ,  Tatsuo Kato ,  Miki Suzuki ,  Tomonari Morishita

发明人： Hideo Nunokawa ,  Tatsuo Kato ,  Miki Suzuki ,  Tomonari Morishita

IPC分类号： G05F1/56

CPC分类号： G05F1/575

摘要： Even when, for example, electric charge is injected into the output transistor due to external factor such as a noise from the outside, to prevent the step-down voltage from rising, the step-down circuit is comprised of an N channel type output transistor which controls the voltage at the control end, a booster, which is connected to the control end of the output transistor and raises the voltage at the control end and a discharge circuit, which discharges the electric charge at the control end of the output transistor so that the power supply voltage inputted from the input end is stepped down to a desired step-down voltage and outputted from the output end.

摘要翻译： 即使例如，由于诸如来自外部的噪声等外部因素将电荷注入到输出晶体管中，为了防止降压电压上升，降压电路由N沟道型输出晶体管 其控制控制端的电压，升压器，其连接到输出晶体管的控制端并提高控制端的电压，以及放电电路，其在输出晶体管的控制端放电电 从输入端输入的电源电压被降低到期望的降压电压并从输出端输出。

公开(公告)号：US08456235B2

公开(公告)日：2013-06-04

申请号：US12535184

申请日：2009-08-04

申请人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/347 ,  H03F3/45183 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/45138 ,  H03F2203/45466

摘要： The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.

公开(公告)号：US07342390B2

公开(公告)日：2008-03-11

申请号：US11589139

申请日：2006-10-30

申请人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kenta Aruga ,  Tatsuo Kato

IPC分类号： G05F3/16

CPC分类号： G05F3/30

摘要： A reference voltage generation circuit has transistors generating a PTAT current that increases in proportion to temperature, a transistor generating a CTAT current that decreases in proportion to temperature, a first variable resistor adjusting an output voltage, a transistor supplying the PTAT current to the first variable resistor via a first switch, a transistor supplying the CTAT current to the first variable resistor via a second switch, and a second variable resistor adjusting the CTAT current. The first switch is on in first and third operation modes and off in a second operation mode. The second switch is on in the first and second operation modes and off in the third operation mode. Switching the operation modes realizes independently outputting a PTAT voltage or a CTAT voltage. Independently adjusting the voltages makes it possible to correct output reference voltage of the reference voltage generation circuit accurately at low cost.

摘要翻译： 参考电压产生电路具有产生与温度成比例地增加的PTAT电流的晶体管，产生与温度成比例地降低的CTAT电流的晶体管，调节输出电压的第一可变电阻器，将PTAT电流提供给第一变量的晶体管 经由第一开关的电阻器，经由第二开关将CTAT电流提供给第一可变电阻器的晶体管，以及调节CTAT电流的第二可变电阻器。 在第一和第三操作模式下，第一开关处于开启状态，并在第二操作模式中关闭。 第二开关在第一和第二操作模式中接通，并且在第三操作模式中断开。 切换操作模式可实现独立输出PTAT电压或CTAT电压。 独立地调节电压可以以低成本准确地校正参考电压产生电路的输出参考电压。