公开(公告)号：US20150263214A1

公开(公告)日：2015-09-17

申请号：US14725480

申请日：2015-05-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Hsiao-Hui Tseng ,  Tzu-Hsuan Hsu

IPC: H01L31/18 ,  H01L31/103 ,  H01L31/02 ,  H01L27/146

CPC classification number: H01L31/18 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14689 ,  H01L31/02 ,  H01L31/103 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method includes forming a first implantation mask comprising a first opening, implanting a first portion of a semiconductor substrate through the first opening to form a first doped region, forming a second implantation mask comprising a second opening, and implanting a second portion of the semiconductor substrate to form a second doped region. The first portion of the semiconductor substrate is encircled by the second portion of the semiconductor substrate. A surface layer of the semiconductor substrate is implanted to form a third doped region of an opposite conductivity type than the first and the second doped regions. The third doped region forms a diode with the first and the second doped regions.

Abstract translation: 一种方法包括形成包括第一开口的第一注入掩模，通过第一开口注入半导体衬底的第一部分以形成第一掺杂区，形成包括第二开口的第二注入掩模，以及注入半导体的第二部分 衬底以形成第二掺杂区域。 半导体衬底的第一部分被半导体衬底的第二部分包围。 注入半导体衬底的表面层以形成与第一和第二掺杂区相反导电类型的第三掺杂区。 第三掺杂区域形成具有第一和第二掺杂区域的二极管。

公开(公告)号：US20150187834A1

公开(公告)日：2015-07-02

申请号：US14660605

申请日：2015-03-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Keng-Yu Chou ,  Pao-Tung Chen ,  Wen-De Wang

IPC: H01L27/146

CPC classification number: H01L27/14685 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor includes first and second radiation-detection devices that are disposed in the substrate. The first and second radiation-detection devices are operable to detect radiation waves that enter the substrate through the back side. The image sensor also includes an anti-reflective coating (ARC) layer. The ARC layer is disposed over the back side of the substrate. The ARC layer has first and second ridges that are disposed over the first and second radiation-detection devices, respectively. The first and second ridges each have a first refractive index value. The first and second ridges are separated by a substance having a second refractive index value that is less than the first refractive index value.

Abstract translation: 提供了一种图像传感器装置。 图像传感器装置包括具有正面和背面的基板。 图像传感器包括设置在基板中的第一和第二放射线检测装置。 第一和第二放射线检测装置可操作以检测通过背面进入衬底的辐射波。 图像传感器还包括抗反射涂层（ARC）层。 ARC层设置在基板的背面上。 ARC层具有分别设置在第一和第二辐射检测装置上的第一和第二脊。 第一和第二脊各自具有第一折射率值。 第一和第二脊由具有小于第一折射率值的第二折射率值的物质分开。

公开(公告)号：US20150115386A1

公开(公告)日：2015-04-30

申请号：US14063953

申请日：2013-10-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Tzu-Hsuan Hsu ,  Feng-Chi Hung ,  Min-Feng Kao

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469

Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.

Abstract translation: 公开了半导体器件，其制造方法和图像传感器器件。 在一些实施例中，半导体器件包括包括阵列区域，外围区域和布置在其中的通孔的半导体芯片。 半导体器件包括设置在半导体芯片之间的保护结构，位于阵列区域和通孔之间，或贯穿通孔与外围区域的一部分之间。

公开(公告)号：US20140138752A1

公开(公告)日：2014-05-22

申请号：US14163060

申请日：2014-01-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang

IPC: H01L27/146

CPC classification number: H01L27/14634 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/1469 ,  H01L27/14696

Abstract: A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition.

公开(公告)号：US11152414B2

公开(公告)日：2021-10-19

申请号：US16259859

申请日：2019-01-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Volume Chien

IPC: H01L27/146 ,  H01L21/762 ,  H01L21/8238

Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth greater than the first depth. The pixel region includes only NMOS devices and the periphery region includes both NMOS and PMOS devices.

公开(公告)号：US10535706B2

公开(公告)日：2020-01-14

申请号：US16220441

申请日：2018-12-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Feng-Chi Hung ,  Tzu-Hsuan Hsu ,  Shu-Ting Tsai ,  Min-Feng Kao

IPC: H01L21/00 ,  H01L27/146 ,  H01L21/768 ,  H01L23/48

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element and a second semiconductor element bonded on the first semiconductor element. The first semiconductor element includes a first substrate, a common conductive feature in the first substrate, a first inter-level dielectric (ILD) layer, a first interconnection feature and a conductive plug connecting the first interconnection feature to the common conductive feature. The second semiconductor element includes a second substrate, a second ILD layers over the second substrate and a second interconnection feature in second ILD layers. The device also includes a conductive deep plug connecting to the common conductive feature in the first semiconductor element and the second interconnection feature. The conductive deep plug is separated with the conductive plug by the first ILD layer.

公开(公告)号：US10192918B2

公开(公告)日：2019-01-29

申请号：US14886290

申请日：2015-10-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Volume Chien

IPC: H01L27/146 ,  H01L21/762 ,  H01L21/8238

Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth. The second depth is greater than the first depth.

公开(公告)号：US09837464B2

公开(公告)日：2017-12-05

申请号：US15437187

申请日：2017-02-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Keng-Yu Chou ,  Shuang-Ji Tsai ,  Min-Feng Kao

IPC: H01L21/00 ,  H01L27/146 ,  G02B1/11

CPC classification number: H01L27/14685 ,  G02B1/11 ,  H01L27/1462 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L31/02161 ,  H01L31/1868 ,  Y02E10/50 ,  Y02P70/521

Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.

公开(公告)号：US09773828B2

公开(公告)日：2017-09-26

申请号：US14856624

申请日：2015-09-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Wen-De Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Jeng-Shyan Lin

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L23/481 ,  H01L27/14621 ,  H01L27/1464 ,  H01L27/14683

Abstract: An image sensor device includes a first substrate, an interconnect structure, a conductive layer, a conductive via and a second substrate. The first substrate includes a first region including a pixel array and a second region including a circuit. The interconnect structure is over the pixel array or the circuit. The interconnect structure electrically connecting the circuit to the pixel array. The conductive layer is on the interconnect structure. The conductive via passes through the second substrate and at least partially embedded in the conductive layer. The second substrate is over the conductive layer.

公开(公告)号：US09673246B2

公开(公告)日：2017-06-06

申请号：US13644783

申请日：2012-10-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Jhy-Ming Hung ,  Pao-Tung Chen

IPC: H01L27/146 ,  H01L23/00

CPC classification number: H01L27/14636 ,  H01L24/82 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14687 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/14 ,  H01L2924/30105

Abstract: A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer.