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    METHOD AND CIRCUITRY FOR CMOS TRANSCONDUCTOR LINEARIZATION
    14.
    发明申请
    METHOD AND CIRCUITRY FOR CMOS TRANSCONDUCTOR LINEARIZATION 有权
    用于CMOS晶体管线性化的方法和电路

    公开(公告)号：US20160134240A1

    公开(公告)日：2016-05-12

    申请号：US14818882

    申请日：2015-08-05

    Applicant: Texas Instruments Incorporated

    Inventor： Harish Kundur Subramaniyan ,  Eric Klumperink ,  Venkatesh Srinivasan ,  Ali Kiaei ,  Bram Nauta

    IPC: H03F1/02 ,  H03F1/32 ,  H03F3/193 ,  H03F1/30

    CPC classification number: H03F3/193 ,  H03F1/0261 ,  H03F1/301 ,  H03F1/308 ,  H03F1/3205 ,  H03F1/3217 ,  H03F3/3022 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2203/30078 ,  H03F2203/30111

    Abstract: Third order distortion is reduced in a CMOS transconductor circuit that includes a first N-channel transistor and a first P-channel transistor, gates of the first N-channel transistor and the first P-channel transistor being coupled to receive an input signal. Drains of the first N-channel transistor and first P-channel transistor are coupled to an output conductor. A first degeneration resistor is coupled between a source of the first P-channel transistor and a first supply voltage and a second degeneration resistor is coupled between a source of the first N-channel transistor and a second supply voltage. A first low impedance bypass circuit is coupled between the sources of the first P-channel transistor and the first N-channel transistor. A low impedance bypass circuit re-circulates second order distortion current that is induced by second-order distortion in drain currents of the first P-channel transistor and the first N-channel transistor, through the first N-channel transistor and first P-channel transistor.

    Abstract translation: 在包括第一N沟道晶体管和第一P沟道晶体管的CMOS跨导电路中，三阶失真减小，第一N沟道晶体管和第一P沟道晶体管的栅极被耦合以接收输入信号。 第一N沟道晶体管和第一P沟道晶体管的漏极耦合到输出导体。 第一退化电阻器耦合在第一P沟道晶体管的源极和第一电源电压之间，而第二退化电阻耦合在第一N沟道晶体管的源极和第二电源电压之间。 第一低阻抗旁路电路耦合在第一P沟道晶体管和第一N沟道晶体管的源极之间。 低阻抗旁路电路通过第一N沟道晶体管和第一P沟道重新流过在第一P沟道晶体管和第一N沟道晶体管的漏极电流中由二阶失真引起的二阶失真电流 晶体管。

    High Linearity Phase Interpolator
    15.
    发明申请
    High Linearity Phase Interpolator 有权

    公开(公告)号：US20210044300A1

    公开(公告)日：2021-02-11

    申请号：US17080879

    申请日：2020-10-27

    Applicant: Texas Instruments Incorporated

    Inventor： Baher Haroun ,  Wenting Zhou ,  Kai Yiu Tam ,  Reza Hoshyar ,  Ali Kiaei

    IPC: H03L7/16 ,  H03K23/00

    Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.

    Self-Injection Locking for Low-Power Low-Phase Noise Oscillators
    17.
    发明申请
    Self-Injection Locking for Low-Power Low-Phase Noise Oscillators 审中-公开

    公开(公告)号：US20190068197A1

    公开(公告)日：2019-02-28

    申请号：US15690117

    申请日：2017-08-29

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Bichoy Bahr ,  Baher Haroun ,  Ali Kiaei

    IPC: H03L1/02 ,  H03K3/03 ,  H03H9/54 ,  H03L7/24

    Abstract: Methods and systems for producing a low-power, low-phase noise oscillating signal using a self-injection locking oscillator. Preferred embodiments include, for example, producing, using an oscillator, a signal having a base frequency component and an Nth harmonic component, wherein N is a selected integer and N>1; filtering said signal through a bandpass filter with Q factor ≥5, said filter configured to pass said Nth harmonic component as a filtered Nth harmonic component; and injecting said filtered Nth harmonic component into said oscillator to thereby self-injection lock said base frequency of said signal.

    Oscillator frequency tuning using bulk acoustic wave resonator
    20.
    发明授权
    Oscillator frequency tuning using bulk acoustic wave resonator 有权

    公开(公告)号：US09692356B2

    公开(公告)日：2017-06-27

    申请号：US14947424

    申请日：2015-11-20

    Applicant: Texas Instruments Incorporated

    Inventor： Baher S. Haroun ,  Ali Kiaei ,  Kai Yiu Tam

    IPC: H03B5/36 ,  H03L1/02

    CPC classification number: H03B5/364 ,  H03B5/326 ,  H03K3/0231 ,  H03L1/02 ,  H03L7/085 ,  H03L7/099 ,  H03L2207/50

    Abstract: The systems and methods of oscillator frequency tuning using a bulk acoustic wave resonator include a relaxation oscillator, a BAW oscillator, a frequency counter, and an adjustment module. The BAW oscillator provides an accurate time reference even over temperature changes. The BAW oscillator is turned on periodically and the relaxation oscillator is calibrated with the BAW oscillator. A temporary and periodic enablement of the BAW oscillator maintains a low current consumption. The frequency counter counts a number of full periods of the BAW oscillator that occur in one period of the relaxation oscillator. Since each frequency is known, the number of pulses of the BAW oscillator that should occur during one period of the relaxation oscillator is known. If the count is different from what should be counted, a correction may be made by adjusting an input parameter of the relaxation oscillator.

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