公开(公告)号：US20200266306A1

公开(公告)日：2020-08-20

申请号：US16867309

申请日：2020-05-05

Applicant: Texas Instruments Incorporated

Inventor： James Becker ,  Henry Litzmann Edwards

IPC: H01L31/0232 ,  H01L31/103 ,  H01L31/02

Abstract: An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the semiconductor substrate and a metal layer. The photodiode includes a first semiconductor layer having the first conductive type and a second semiconductor layer, formed on the first semiconductor layer, including a plurality of cathodes having a second conductive type. The first semiconductor layer is configured to collect photocurrent upon reception of incident light. The cathodes are configured to be electrically connected to the first semiconductor layer and the second semiconductor layer is configured to, based on the collected photocurrent, to track the incident light. The metal layer further includes a pinhole configured to collimate the incident light, and the plurality of cathodes form a rotational symmetry of order n with respect to an axis of the pinhole.

公开(公告)号：US20200013890A1

公开(公告)日：2020-01-09

申请号：US16574394

申请日：2019-09-18

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  James Robert Todd ,  Binghua Hu ,  Xiaoju Wu ,  Stephanie L. Hilbun

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/10

Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods therefor, including a multi-fingered transistor structure formed in an active region of a semiconductor substrate, in which a transistor drain finger is centered in a multi-finger transistor structure, a transistor body region laterally surrounds the transistor, an outer drift region laterally surrounds an active region of the semiconductor substrate, and one or more inactive or dummy structures are formed at lateral ends of the transistor finger structures.

公开(公告)号：US20200006550A1

公开(公告)日：2020-01-02

申请号：US16021647

申请日：2018-06-28

Applicant: Texas Instruments Incorporated

Inventor： James Robert Todd ,  Xiaoju Wu ,  Henry Litzmann Edwards ,  Binghua Hu

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/66 ,  H01L21/285 ,  H01L29/417

Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods in which a silicide block material or other protection layer is formed on a field oxide structure above a drift region to protect the field oxide structure from damage during deglaze processing. Further described examples include a shallow trench isolation (STI) structure that laterally surrounds an active region of a semiconductor substrate, where the STI structure is laterally spaced from the oxide structure, and is formed under gate contacts of the transistor.

公开(公告)号：US20200006549A1

公开(公告)日：2020-01-02

申请号：US16021601

申请日：2018-06-28

Applicant: Texas Instruments Incorporated

Inventor： Alexei Sadovnikov ,  Andrew Derek Strachan ,  Henry Litzmann Edwards ,  Dhanoop Varghese ,  Xiaoju Wu ,  Binghua Hu ,  James Robert Todd

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/266 ,  H01L21/265

Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods in which an oxide structure is formed over a drift region of a semiconductor substrate, and a shallow implantation process is performed using a first mask that exposes the oxide structure and a first portion of the semiconductor substrate to form a first drift region portion for connection to a body implant region. A second drift region portion is implanted in the semiconductor substrate under the oxide structure by a second implantation process using the first mask at a higher implant energy.

公开(公告)号：US20190229111A1

公开(公告)日：2019-07-25

申请号：US16371960

申请日：2019-04-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Akram Ali Salman

IPC: H01L27/02 ,  H01L29/732 ,  H01L29/06 ,  H01L29/08 ,  H01L23/528 ,  H01L29/10 ,  H01L21/8249 ,  H01L29/66

Abstract: An integrated circuit includes a plurality of first n-type regions and a plurality of second n-type regions that each intersect a surface of a substrate. The first n-type regions are arranged in a first linear array within a first n-well and a second linear array within a second n-well. The first and second n-wells are each located within and separated by a first p-type region. The second n-type regions are located within and separated by a second p-type region. An n-type trench region is located between the first and second p-type regions. The n-type trench region extends into the substrate toward an n-type buried layer that extends under the first p-type region and the second p-type region.

公开(公告)号：US20190109245A1

公开(公告)日：2019-04-11

申请号：US16212870

申请日：2018-12-07

Applicant: Texas Instruments Incorporated

Inventor： Debarshi Basu ,  Henry Litzmann Edwards ,  Ricky A. Jackson ,  Marco A. Gardner

IPC: H01L31/0232 ,  H01L31/103 ,  G01J1/02 ,  G01J1/42 ,  H01L25/16 ,  G01J1/04

Abstract: An integrated circuit that includes a substrate, a photodiode, and a Fresnel structure. The photodiode is formed on the substrate, and it has a p-n junction. The Fresnel structure is formed above the photodiode, and it defines a focal zone that is positioned within a proximity of the p-n junction. In one aspect, the Fresnel structure may include a trench pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In another aspect, the Fresnel structure may include a wiring pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In yet another aspect, the Fresnel structure may include a transparent dielectric pattern that functions as a refractive means for redirecting and concentrating incident photons to the focal zone.

公开(公告)号：US10069023B2

公开(公告)日：2018-09-04

申请号：US14157891

申请日：2014-01-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： James Becker ,  Henry Litzmann Edwards

IPC: H01L27/148 ,  H01L31/00 ,  H01L31/0232 ,  H01L31/02 ,  H01L31/103

Abstract: An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the semiconductor substrate and a metal layer. The photodiode includes a first semiconductor layer having the first conductive type and a second semiconductor layer, formed on the first semiconductor layer, including a plurality of cathodes having a second conductive type. The first semiconductor layer is configured to collect photocurrent upon reception of incident light. The cathodes are configured to be electrically connected to the first semiconductor layer and the second semiconductor layer is configured to, based on the collected photocurrent, to track the incident light. The metal layer further includes a pinhole configured to collimate the incident light, and the plurality of cathodes form a rotational symmetry of order n with respect to an axis of the pinhole

公开(公告)号：US09887288B2

公开(公告)日：2018-02-06

申请号：US14957223

申请日：2015-12-02

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Binghua Hu ,  James Robert Todd

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06 ,  H01L29/08 ,  H01L29/167 ,  H01L21/265 ,  H01L21/324

CPC classification number: H01L29/7816 ,  H01L21/26513 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835

Abstract: A laterally diffused metal oxide semiconductor (LDMOS) device includes a substrate having a p-epi layer thereon, a p-body region in the p-epi layer and an ndrift (NDRIFT) region within the p-body to provide a drain extension region. A gate stack includes a gate dielectric layer over a channel region in the p-body region adjacent to and on respective sides of a junction with the NDRIFT region. A patterned gate electrode is on the gate dielectric. A DWELL region is within the p-body region. A source region is within the DWELL region, and a drain region is within the NDRIFT region. An effective channel length (Leff) for the LDMOS device is 75 nm to 150 nm which evidences a DWELL implant that utilized an edge of the gate electrode to delineate an edge of a DWELL ion implant so that the DWELL region is self-aligned to the gate electrode.

公开(公告)号：US09818795B2

公开(公告)日：2017-11-14

申请号：US15255243

申请日：2016-09-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey R. Debord ,  Henry Litzmann Edwards ,  Kenneth J. Maggio

IPC: H01L29/66 ,  H01L27/16 ,  H01L35/04 ,  H01L21/768 ,  H01L21/8238 ,  H01L27/06 ,  H01L23/485 ,  H01L23/522 ,  H01L35/30 ,  H01L27/092

CPC classification number: H01L27/16 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/76879 ,  H01L21/823878 ,  H01L23/485 ,  H01L23/5226 ,  H01L27/0617 ,  H01L27/092 ,  H01L35/04 ,  H01L35/30 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In described examples, an integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming active areas which provide transistor active areas for an NMOS transistor and a PMOS transistor of the CMOS transistors and provide n-type thermoelectric elements and p-type thermoelectric elements of the embedded thermoelectric device. Stretch contacts with lateral aspect ratios greater than 4:1 are formed over the n-type thermoelectric elements and p-type thermoelectric elements to provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device. The stretch contacts are formed by forming contact trenches in a dielectric layer, filling the contact trenches with contact metal and subsequently removing the contact metal from over the dielectric layer. The stretch contacts are formed concurrently with contacts to the NMOS and PMOS transistors.

公开(公告)号：US09768340B2

公开(公告)日：2017-09-19

申请号：US14552995

申请日：2014-11-25

Applicant: Texas Instruments Incorporated

Inventor： Debarshi Basu ,  Henry Litzmann Edwards ,  Dimitar Trifonov Trifonov ,  Josh Du

IPC: H01L31/101 ,  H01L31/11

CPC classification number: H01L31/1105

Abstract: This invention relates to field photodiodes based on PN junctions that suffer from dark current leakage. An NBL is added to prove a second PN junction with the anode. The second PN junction is reversed biased in order to remove dark current leakage. The present solution requires no additional masks or thin films steps relative to a conventional CMOS process flow.