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    Single ended charge to voltage front-end circuit
    11.
    发明授权
    Single ended charge to voltage front-end circuit 有权
    单端充电至电压前端电路

    公开(公告)号：US09461628B2

    公开(公告)日：2016-10-04

    申请号：US14580388

    申请日：2014-12-23

    Applicant: Texas Instruments Incorporated

    Inventor： Rahul Sharma ,  Nagesh Surendranath ,  Sandeep Kesrimal Oswal

    IPC: H03F3/45 ,  H03K3/012 ,  H02M1/08 ,  H02M1/12 ,  H03K17/687 ,  H03H11/12 ,  H03H19/00 ,  G06G7/184 ,  G05F1/56 ,  G06G7/186

    CPC classification number: H03K3/012 ,  G05F1/561 ,  G06G7/184 ,  G06G7/186 ,  H02M1/08 ,  H02M1/12 ,  H02M2001/123 ,  H03F3/082 ,  H03H11/1291 ,  H03H19/004 ,  H03K4/023 ,  H03K17/687

    Abstract: Charge to voltage conversion integrator circuitry for data acquisition front-end and other applications to provide a single-ended up a voltage using an input bias capacitance and a switching circuit to selectively place an input transistor in a negative feedback configuration in a first mode to charge the input bias capacitance to a calibration voltage for compensating integrator amplifier bias circuitry, with the switching circuit connecting an input node and the input bias capacitance in a second mode to integrate the input current signal across a feedback capacitance to provide a single-ended output voltage with the input bias capacitance maintaining a zero voltage at the input node.

    Abstract translation: 充电到电压转换积分电路，用于数据采集前端和其他应用，以提供使用输入偏置电容的单端上电压和开关电路，以在第一模式中将输入晶体管选择性地置于负反馈配置中以进行充电 将校准电压的输入偏置电容用于补偿积分放大器偏置电路，其中开关电路将输入节点和输入偏置电容连接在第二模式中，以将输入电流信号整合在反馈电容上以提供单端输出电压 输入偏置电容在输入节点保持零电压。

    METHODS AND APPARATUS TO CAPTURE SWITCH CHARGE INJECTIONS AND COMPARATOR KICKBACK EFFECTS
    12.
    发明公开
    METHODS AND APPARATUS TO CAPTURE SWITCH CHARGE INJECTIONS AND COMPARATOR KICKBACK EFFECTS 审中-公开

    公开(公告)号：US20240213998A1

    公开(公告)日：2024-06-27

    申请号：US18129604

    申请日：2023-03-31

    Applicant: Texas Instruments Incorporated

    Inventor： Rajashekar Goroju ,  Prasanth K ,  Dileepkumar Ramesh Bhat ,  Rakul Viswanath ,  Sravana Kumar Goli ,  Rahul Sharma

    IPC: H03M1/38

    CPC classification number: H03M1/38

    Abstract: An example apparatus includes: controller circuitry configured to: provide switch signals to capacitive digital to analog converter (C-DAC) circuitry, the C-DAC circuitry including switches; configuring the switches into a third configuration begin an Auto Zero (AZ) phase with a third switch in a closed state; configuring the switches into a fourth configuration to repeat the transition of the third switch to the open state corresponding to a first configuration; configuring the switches into a fifth configuration to repeat the transition of a first switch and a second switch to the open state corresponding to a second configuration; configuring the switches into a sixth configuration to repeat the transition of the third switch to the closed state corresponding to a second configuration; and performing an AZ decision with the switches in the sixth configuration.

    Programmable gain low noise amplifier
    13.
    发明授权
    Programmable gain low noise amplifier 有权

    公开(公告)号：US11936346B2

    公开(公告)日：2024-03-19

    申请号：US17231728

    申请日：2021-04-15

    Applicant: Texas Instruments Incorporated

    Inventor： Rahul Sharma ,  Jagannathan Venkataraman ,  Sandeep Oswal ,  Visvesvaraya Appala Pentakota

    IPC: H03F3/19 ,  H03H11/04 ,  H03M1/12

    CPC classification number: H03F3/19 ,  H03H11/04 ,  H03M1/1245 ,  H03F2200/451

    Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

    METHODS AND APPARATUS TO REDUCE INTER-STAGE GAIN ERRORS IN ANALOG-TO-DIGITAL CONVERTERS
    14.
    发明公开
    METHODS AND APPARATUS TO REDUCE INTER-STAGE GAIN ERRORS IN ANALOG-TO-DIGITAL CONVERTERS 审中-公开

    公开(公告)号：US20240072817A1

    公开(公告)日：2024-02-29

    申请号：US17899149

    申请日：2022-08-30

    Applicant: Texas Instruments Incorporated

    Inventor： Prasanth K ,  Rahul Sharma

    IPC: H03M1/06 ,  H03M1/10

    CPC classification number: H03M1/0609 ,  H03M1/1023

    Abstract: An example analog-to-digital converter (ADC) comprising: sample and hold circuitry coupled to an analog input; a first sub-ADC coupled to the sample and hold circuitry; a multiplying digital-to-analog converter (M-DAC) coupled to the first sub-ADC; summation circuitry coupled to the sample and hold circuitry and the M-DAC; an amplifier coupled to the summation circuitry; a second sub-ADC coupled to the amplifier; and reference generation circuitry coupled to the first sub-ADC, the M-DAC, and the second sub-ADC, the reference generation circuitry including: reference voltage circuitry coupled to the M-DAC; a first resistor coupled to the reference voltage circuitry; a second resistor coupled to the first resistor; and a capacitor coupled in parallel to the second resistor by a switch.

    LOW DISTORTION DRIVER FOR ANALOG-TO-DIGITAL CONVERTER (ADC)
    15.
    发明公开
    LOW DISTORTION DRIVER FOR ANALOG-TO-DIGITAL CONVERTER (ADC) 审中-公开

    公开(公告)号：US20240007118A1

    公开(公告)日：2024-01-04

    申请号：US17853837

    申请日：2022-06-29

    Applicant: Texas Instruments Incorporated

    Inventor： Dileep Kumar Bhat ,  Rahul Sharma

    IPC: H03M1/12 ,  H03F3/04 ,  H03G3/30

    CPC classification number: H03M1/12 ,  H03F3/04 ,  H03G3/30

    Abstract: A driver includes an inverting amplifier stage and a non-inverting amplifier stage. The inverting amplifier stage includes an inverting amplifier input and an inverting amplifier output. The inverting amplifier stage includes a first voltage follower which includes a first voltage follower input coupled to the inverting amplifier input and a first voltage follower output coupled to the inverting amplifier output. The inverting amplifier stage includes a first gain-boost amplifier coupled to the first voltage follower. The non-inverting amplifier stage includes a non-inverting amplifier input and a non-inverting amplifier output. The non-inverting amplifier stage includes a second voltage follower which includes a second voltage follower input coupled to the non-inverting amplifier input and a second voltage follower output coupled to the non-inverting amplifier output. The non-inverting amplifier stage includes a second gain-boost amplifier coupled to the second voltage follower.

    Programmable Gain Low Noise Amplifier
    16.
    发明申请
    Programmable Gain Low Noise Amplifier 有权

    公开(公告)号：US20220337203A1

    公开(公告)日：2022-10-20

    申请号：US17231728

    申请日：2021-04-15

    Applicant: Texas Instruments Incorporated

    Inventor： Rahul Sharma ,  Jagannathan Venkataraman ,  Sandeep Oswal ,  Visvesvaraya Appala Pentakota

    IPC: H03F3/19 ,  H03H11/04 ,  H03M1/12

    Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

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