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    Semiconductor devices with a sloped surface
    13.
    发明授权
    Semiconductor devices with a sloped surface 有权

    公开(公告)号：US11195915B2

    公开(公告)日：2021-12-07

    申请号：US16384700

    申请日：2019-04-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Haian Lin ,  Frank Alexander Baiocchi ,  Seetharaman Sridhar

    IPC: H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423

    Abstract: In some examples, a semiconductor device, comprises a semiconductor substrate; an epitaxial layer having a top side disposed on the semiconductor substrate, wherein the epitaxial layer has a source implant region, a drain implant region, a first doped region, and a second doped region, wherein the first doped region is adjacent to the source implant region and the second doped region is adjacent to the drain implant region, wherein the top side has a sloped surface over the second doped region; a gate electrode supported by the top side; a source electrode in contact with the source implant region; and a drain electrode in contact with the drain implant region.

    HIGH VOLTAGE LATERAL JUNCTION DIODE DEVICE
    17.
    发明申请
    HIGH VOLTAGE LATERAL JUNCTION DIODE DEVICE 审中-公开

    公开(公告)号：US20190198666A1

    公开(公告)日：2019-06-27

    申请号：US15850854

    申请日：2017-12-21

    Applicant: Texas Instruments Incorporated

    Inventor： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

    IPC: H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/49 ,  H01L29/66 ,  H01L21/761 ,  H01L21/28 ,  H03K17/687

    Abstract: A lateral junction diode device includes a substrate having at least a semiconductor surface layer. A depletion-mode LDMOS device is in the semiconductor surface layer including a source, drain, and a gate above a gate dielectric, and a channel region under the gate on the gate dielectric. A drift region is between the channel region and the drain, wherein the drain also provides a cathode for the lateral junction diode device. An embedded diode includes a second cathode and an anode that is shared with the device. The embedded diode is junction isolated by an isolation region located between the anode and the source. The anode and isolation region are directly connected to the gate and the second cathode is directly connected to the source.

    Multiple Shielding Trench Gate FET
    20.
    发明申请
    Multiple Shielding Trench Gate FET 审中-公开

    公开(公告)号：US20170288052A1

    公开(公告)日：2017-10-05

    申请号：US15622869

    申请日：2017-06-14

    Applicant: Texas Instruments Incorporated

    Inventor： Hideaki Kawahara ,  Seetharaman Sridhar ,  Christopher Boguslaw Kocon ,  Simon John Molloy ,  Hong Yang

    IPC: H01L29/78 ,  H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/40

    Abstract: A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.

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