Adaptive gain and bandwidth ramp generator

    公开(公告)号:US11695320B2

    公开(公告)日:2023-07-04

    申请号:US17214527

    申请日:2021-03-26

    Abstract: In some examples, a circuit includes a resistor network, a filter, a current generator, and a capacitor. The resistor network has a resistor network output and is adapted to be coupled between a switch terminal of a power converter (104) and a ground terminal. The filter has a filter input and a filter output, the filter input coupled to the resistor network output. The current generator has a current generator output and first and second current generator inputs, the first current generator input configured to receive an input voltage and the second current generator input coupled to the filter output. The capacitor is coupled between the current generator output and the ground terminal.

    GROUND REFERENCE GENERATOR FOR POWER CONVERTER

    公开(公告)号:US20240429819A1

    公开(公告)日:2024-12-26

    申请号:US18211788

    申请日:2023-06-20

    Abstract: A ground reference circuit to generate a ground reference for a voltage reference circuit includes a resistor coupled in series with a transistor via a current mirror. The resistor is coupled between a ground reference terminal of the voltage reference circuit and a ground terminal of a power converter. The transistor control terminal is configured to receive a pulse width modulation (PWM) control signal having a duty cycle similar to a switching element duty cycle of the power converter. The current mirror circuit is coupled between a current terminal of the transistor and the ground reference terminal. A controller configured to control the switching element duty cycle may include the ground reference circuit, along with the voltage reference circuit, and a PWM circuit configured to determine the switching element duty cycle based on a comparison between a reference voltage provided by the voltage reference circuit and the converter output voltage.

    ADJUSTABLE POWER FET DRIVER
    13.
    发明公开

    公开(公告)号:US20240146298A1

    公开(公告)日:2024-05-02

    申请号:US17977822

    申请日:2022-10-31

    CPC classification number: H03K17/6871 H03K5/13 H03K2005/00019

    Abstract: In described examples, an integrated circuit includes first and second current sources, first and second switches, a dV/dt phase detector, a control circuit, and source, gate, and drain terminals for coupling to, respectively, a source, gate, and drain of a power FET. The first switch is coupled between the first current source and the gate terminal. The second switch is coupled between the second current source and the gate terminal. The dV/dt phase detector detects a dV/dt phase of the power FET and outputs to the control circuit. The control circuit controls the first and second switches to perform a turn-on sequence of the power FET, including: closing the first switch while keeping the second switch open; and after receiving a signal from the dV/dt phase detector indicating the dV/dt phase has started, opening the first switch, and closing the second switch.

    ADAPTIVE GAIN AND BANDWIDTH RAMP GENERATOR

    公开(公告)号:US20220158537A1

    公开(公告)日:2022-05-19

    申请号:US17214527

    申请日:2021-03-26

    Abstract: In some examples, a circuit includes a resistor network, a filter, a current generator, and a capacitor. The resistor network has a resistor network output and is adapted to be coupled between a switch terminal of a power converter (104) and a ground terminal. The filter has a filter input and a filter output, the filter input coupled to the resistor network output. The current generator has a current generator output and first and second current generator inputs, the first current generator input configured to receive an input voltage and the second current generator input coupled to the filter output. The capacitor is coupled between the current generator output and the ground terminal.

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