公开(公告)号：US20140218112A1

公开(公告)日：2014-08-07

申请号：US13761357

申请日：2013-02-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Steven G. Brantley ,  Vadim V. Ivanov

IPC: H03F3/45 ,  H03F1/22

CPC classification number: H03F3/45071 ,  H03F1/223 ,  H03F3/45192 ,  H03F2200/411

Abstract: An operational amplifier (10) capable of driving a capacitive load (CLOAD) and/or a resistive load (RLOAD) includes a first gain stage (2) having an output coupled to a high impedance node (3) and a second gain stage (5) having an input coupled to the first high impedance node. A gain reduction resistor (RD) and an AC coupling capacitor (CD) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (CM) is coupled between an output conductor (7) of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (MCASCODE).

Abstract translation: 能够驱动电容性负载（CLOAD）和/或电阻负载（RLOAD）的运算放大器（10）包括：第一增益级（2），其具有耦合到高阻抗节点（3）和第二增益级（ 5）具有耦合到第一高阻抗节点的输入。 增益减小电阻（RD）和AC耦合电容（CD）串联耦合在高阻抗节点和参考电压之间。 米勒反馈电容器（CM）耦合在第二增益级的输出导体（7）和高阻抗节点之间。 第二增益级的输出可以通过共源共栅晶体管（MCASCODE）耦合到高阻抗节点。

公开(公告)号：US10511269B2

公开(公告)日：2019-12-17

申请号：US15995355

申请日：2018-06-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bharath Karthik Vasan ,  Srinivas K. Pulijala ,  Steven G. Brantley

IPC: H03F1/32 ,  H03F3/45 ,  H03F3/21

Abstract: A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

公开(公告)号：US10461706B1

公开(公告)日：2019-10-29

申请号：US15966946

申请日：2018-04-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Steven G. Brantley ,  Bharath Karthik Vasan ,  Srinivas K. Pulijala ,  Martijn Snoeij

IPC: H03F3/45 ,  H03F3/68 ,  H03F1/02 ,  H03F1/08

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

公开(公告)号：US20180145633A1

公开(公告)日：2018-05-24

申请号：US15876561

申请日：2018-01-22

Applicant: Texas Instruments Incorporated

Inventor： Srinivas K. Pulijala ,  Steven G. Brantley

IPC: H03F1/02 ,  H03F3/20

CPC classification number: H03F1/02 ,  H03F1/14 ,  H03F3/20 ,  H03F2200/135 ,  H03F2200/153 ,  H03F2200/171 ,  H03F2200/297 ,  H03F2200/408

Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.

公开(公告)号：US09954496B2

公开(公告)日：2018-04-24

申请号：US15385200

申请日：2016-12-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Steven G. Brantley ,  Bharath Karthik Vasan ,  John Lawrence Caldwell

IPC: H03F1/14 ,  H03F1/30 ,  H03F3/187 ,  H03G1/00 ,  H03G3/30 ,  H03F3/30 ,  H03F3/45

CPC classification number: H03F1/305 ,  H03F3/187 ,  H03F3/3069 ,  H03F3/45085 ,  H03F3/45596 ,  H03F2200/03 ,  H03F2200/375 ,  H03G1/0023 ,  H03G1/0088 ,  H03G3/3005 ,  H03G3/348

Abstract: At least some embodiments are directed to a system comprising an amplifier containing a first bias current source and configured to provide an output voltage at a node, a gain stage coupled to the node and comprising a second bias current source, and a buffer stage coupled to the node and comprising third and fourth bias current sources and an additional set of bias current sources, the third and fourth bias current sources are able to activate output transistors that are configured to increase current provided to a load. The system also comprises a controller configured to activate the first bias current source, to activate the second bias current source after the first bias current source is activated, to activate the bias current sources in the set after the first bias current source is activated, and to activate the third and fourth bias current sources after the first and second bias current sources are activated and after the bias current sources in the set are activated.

公开(公告)号：US09595929B2

公开(公告)日：2017-03-14

申请号：US14508755

申请日：2014-10-07

Applicant: Texas Instruments Incorporated

Inventor： Srinivas K. Pulijala ,  Steven G. Brantley

IPC: H03F3/04 ,  H03F3/20 ,  H03F1/14

CPC classification number: H03F1/02 ,  H03F1/14 ,  H03F3/20 ,  H03F2200/135 ,  H03F2200/153 ,  H03F2200/171 ,  H03F2200/297 ,  H03F2200/408

Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.

Abstract translation: 放大器包括放大器输入和放大器输出。 补偿网络耦合到放大器输出。 补偿网络包括至少一个调谐到放大器工作频率的RC网络。 补偿网络提供至少一个零以补偿由耦合到放大器输出的负载引入的至少一个极点。

公开(公告)号：US20150102858A1

公开(公告)日：2015-04-16

申请号：US14508755

申请日：2014-10-07

Applicant: Texas Instruments Incorporated

Inventor： Srinivas K. Pulijala ,  Steven G. Brantley

IPC: H03F1/02 ,  H03F3/21

CPC classification number: H03F1/02 ,  H03F1/14 ,  H03F3/20 ,  H03F2200/135 ,  H03F2200/153 ,  H03F2200/171 ,  H03F2200/297 ,  H03F2200/408

Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.

Abstract translation: 放大器包括放大器输入和放大器输出。 补偿网络耦合到放大器输出。 补偿网络包括至少一个调谐到放大器工作频率的RC网络。 补偿网络提供至少一个零以补偿由耦合到放大器输出的负载引入的至少一个极点。