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公开(公告)号:US09905462B2
公开(公告)日:2018-02-27
申请号:US14985969
申请日:2015-12-31
Applicant: Toshiba Memory Corporation
Inventor: Atsuko Sakata , Takeshi Ishizaki , Shinya Okuda , Kei Watanabe , Masayuki Kitamura , Satoshi Wakatsuki , Daisuke Ikeno , Junichi Wada , Hirotaka Ogihara
IPC: H01L27/115 , H01L29/792 , H01L21/768 , H01L27/11582 , H01L21/3065 , H01L29/788
CPC classification number: H01L21/76879 , H01L21/3065 , H01L21/76843 , H01L21/76864 , H01L27/11582 , H01L29/7881
Abstract: According to one embodiment, the stacked body includes a plurality of metal films, a plurality of silicon oxide films, and a plurality of intermediate films. The intermediate films are provided between the metal films and the silicon oxide films. The intermediate films contain silicon nitride. Nitrogen composition ratios of the intermediate films are higher on sides of interfaces between the intermediate films and the metal films than on sides of interfaces between the intermediate films and the silicon oxide films. Silicon composition ratios of the intermediate films are higher on sides of interfaces between the intermediate films and the silicon oxide films than on sides of interfaces between the intermediate films and the metal films.
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公开(公告)号:US09754793B2
公开(公告)日:2017-09-05
申请号:US15376336
申请日:2016-12-12
Applicant: Toshiba Memory Corporation
Inventor: Shinichi Nakao , Shunsuke Ochiai , Yusuke Oshiki , Kei Watanabe , Mitsuhiro Omura , Kosuke Horibe , Atsuko Sakata , Junichi Wada , Soichi Yamazaki , Masayuki Kitamura , Yuya Matsubara
IPC: H01L21/336 , H01L21/3065 , H01L21/308 , H01L27/11582
CPC classification number: H01L21/3065 , H01L21/3081 , H01L21/31144 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L27/11582 , H01L28/00
Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.
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公开(公告)号:US11177135B2
公开(公告)日:2021-11-16
申请号:US16283570
申请日:2019-02-22
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Yuya Matsubara , Masayuki Kitamura , Atsuko Sakata
IPC: H01L21/3065 , H01L27/11582 , H01L21/311 , H01L21/033 , H01L21/308 , H01L21/02 , H01L21/3213
Abstract: A mask member contains tungsten (W), boron (B), and carbon (C). The mask member includes a first portion in contact with a process film, the first portion, in which the terms of the composition ratio, which correspond to boron and carbon, are larger than the term of the composition ratio, which corresponds to tungsten, and a second portion in which the term of the composition ratio, which corresponds to tungsten, is larger than the terms of the composition ratio, which correspond to carbon and boron.
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公开(公告)号:US11004804B2
公开(公告)日:2021-05-11
申请号:US16294984
申请日:2019-03-07
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Satoshi Wakatsuki , Masayuki Kitamura , Atsuko Sakata
IPC: H01L23/00 , H01L27/11568 , H01L27/11521 , H01L29/06
Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
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公开(公告)号:US09911753B2
公开(公告)日:2018-03-06
申请号:US15257138
申请日:2016-09-06
Applicant: Toshiba Memory Corporation
Inventor: Masayuki Kitamura , Atsuko Sakata , Satoshi Wakatsuki , Takeshi Ishizaki , Daisuke Ikeno , Tomotaka Ariga
IPC: H01L27/115 , H01L21/48 , H01L23/498 , H01L29/792 , H01L29/66 , H01L27/11582 , H01L27/11556
CPC classification number: H01L27/11582 , H01L21/486 , H01L23/49827 , H01L27/11556 , H01L28/00 , H01L29/66833 , H01L29/7926
Abstract: According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.
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