公开(公告)号：US10825770B2

公开(公告)日：2020-11-03

申请号：US16298056

申请日：2019-03-11

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Akitsugu Hatazaki ,  Hiroko Tahara ,  Naomi Fukumaki ,  Masayuki Kitamura ,  Takashi Ohashi

IPC: H01L21/768 ,  H01L27/11551 ,  H01L27/11521 ,  H01L21/822 ,  H01L27/11578 ,  H01L23/532 ,  H01L21/311

Abstract: A semiconductor device according to one embodiment includes a semiconductor substrate, a stack body including metal films and first insulating films alternately stacked on the semiconductor substrate and including a stepped end portion, conducting films respectively protruding from the metal films on all steps of the end portion, contact portions respectively provided above the conducting films, a second insulating film surrounding side surfaces of the contact portions, and a barrier metal film provided between the second insulating film and the contact portions and between the conducting films and the contact portions. The entire top surfaces of the conducting films are covered by the barrier metal film and the second insulating film.

公开(公告)号：US11189489B2

公开(公告)日：2021-11-30

申请号：US16567269

申请日：2019-09-11

Applicant: Toshiba Memory Corporation

Inventor： Masayuki Kitamura ,  Takayuki Beppu ,  Tomotaka Ariga

IPC: H01L21/02 ,  H01L21/67 ,  C23C16/44 ,  C23C16/455 ,  C23C16/14 ,  H01L21/306 ,  H01L21/285

Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.

公开(公告)号：US11139173B2

公开(公告)日：2021-10-05

申请号：US16031544

申请日：2018-07-10

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Katsuaki Natori ,  Satoshi Wakatsuki ,  Masayuki Kitamura

IPC: H01L21/285 ,  H01L21/768

Abstract: A production method of a semiconductor device includes introducing a reduction gas for reducing metal to a space containing a target to be used as the semiconductor device. The method also includes introducing a material gas and a first gas simultaneously to the space on a basis of a predetermined partial pressure ratio after introducing the reduction gas, to form a film that contains the metal, on the target. The material gas etches the metal when only the material gas is flowed. The first gas is different from the material gas. The predetermined partial pressure ratio is a ratio of the material gas and the first gas.

公开(公告)号：US20200091081A1

公开(公告)日：2020-03-19

申请号：US16298056

申请日：2019-03-11

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Akitsugu HATAZAKI ,  Hiroko Tahara ,  Naomi Fukumaki ,  Masayuki Kitamura ,  Takashi Ohashi

IPC: H01L23/532 ,  H01L21/768

Abstract: A semiconductor device according to one embodiment includes a semiconductor substrate, a stack body including metal films and first insulating films alternately stacked on the semiconductor substrate and including a stepped end portion, conducting films respectively protruding from the metal films on all steps of the end portion, contact portions respectively provided above the conducting films, a second insulating film surrounding side surfaces of the contact portions, and a barrier metal film provided between the second insulating film and the contact portions and between the conducting films and the contact portions. The entire top surfaces of the conducting films are covered by the barrier metal film and the second insulating film.

公开(公告)号：US10566280B2

公开(公告)日：2020-02-18

申请号：US16103106

申请日：2018-08-14

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Satoshi Wakatsuki ,  Masayuki Kitamura ,  Takeshi Ishizaki ,  Hiroshi Itokawa ,  Daisuke Ikeno ,  Kei Watanabe ,  Atsuko Sakata

IPC: H01L23/522 ,  H01L27/1157 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/532 ,  H01L21/28

Abstract: In one embodiment, a semiconductor device includes a first insulator. The device further includes a metal layer that includes a first metal layer provided on a surface of the first insulator, and a second metal layer provided on a surface of the first metal layer and containing a first metallic element and oxygen or containing aluminum and nitrogen, or includes a third metal layer provided on the surface of the first insulator and containing a second metallic element, aluminum and nitrogen. The device further includes an interconnect material layer provided on a surface of the metal layer.

公开(公告)号：US20200090931A1

公开(公告)日：2020-03-19

申请号：US16283609

申请日：2019-02-22

Applicant: Toshiba Memory Corporation

Inventor： Yuya MATSUBARA ,  Masayuki Kitamura ,  Atsuko Sakata

IPC: H01L21/02 ,  H01L21/285 ,  C23C16/50 ,  C23C16/30 ,  C23C16/52 ,  C23C16/32

Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.

公开(公告)号：US09991159B2

公开(公告)日：2018-06-05

申请号：US15449233

申请日：2017-03-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Fuyuma Ito ,  Yasuhito Yoshimizu ,  Yuya Akeboshi ,  Hisashi Okuchi ,  Masayuki Kitamura

IPC: H01L21/768 ,  H01L21/027 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76879 ,  H01L21/0272 ,  H01L21/0273 ,  H01L21/76802 ,  H01L21/76831 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238

Abstract: According to some embodiments, a semiconductor device manufacturing method includes forming a sacrificial film on a material film. The method includes processing the sacrificial film, and forming a first groove in the sacrificial film having a first width and a second groove in the sacrificial film having a second width larger than the first width, the material film defining a base of the first groove and a base of the second groove. The method includes forming a catalyst layer on the sacrificial film, and on the base of the first groove and the base of the second groove. The method includes forming a first metal film having a thickness equal to or larger than half the first width and smaller than half the second width on the catalyst layer by plating. The method includes removing at least a portion of the first metal film in the second groove while leaving a portion of the first metal film in the first groove unremoved. The method includes removing the catalyst layer on the sacrificial film while leaving the catalyst layer on the base of the second groove unremoved. The method includes forming a second metal film in the second groove by the plating.

公开(公告)号：US11139246B2

公开(公告)日：2021-10-05

申请号：US16559001

申请日：2019-09-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masayuki Kitamura ,  Atsushi Kato

IPC: H01L23/12 ,  H01L23/48 ,  H01L21/4763 ,  H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/48 ,  H01L23/528 ,  H01L27/11582

Abstract: According to one embodiment, a semiconductor device includes: a semiconductor substrate; a first via provided on the semiconductor substrate; a metal wiring provided on the first via; and a second via provided on the metal wiring. One of the side surfaces facing each other in the first direction of the metal wiring and one of the side surfaces facing each other in the first direction of the second via are aligned in the first direction.

公开(公告)号：US10199391B2

公开(公告)日：2019-02-05

申请号：US15688646

申请日：2017-08-28

Applicant: Toshiba Memory Corporation

Inventor： Taishi Ishikura ,  Atsunobu Isobayashi ,  Masayuki Kitamura ,  Akihiro Kajita

IPC: H01L27/11582 ,  H01L27/11568 ,  H01L27/11551 ,  H01L29/792 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11565 ,  H01L29/66 ,  H01L27/11573 ,  H01L27/11553 ,  H01L27/11578

Abstract: A semiconductor device includes an under layer, a stacked body comprising a plurality of conductive layers and insulating layers alternately stacked one over the other in a stacking direction, above the insulating layer, a columnar portion extending into the stacked body in the stacking direction of the stacked body, and a graphene film between at least one of the conductive layers and adjacent insulating layers and between the at least one of the conductive layers and the columnar portion.

公开(公告)号：US10134673B2

公开(公告)日：2018-11-20

申请号：US15449654

申请日：2017-03-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masayuki Kitamura ,  Atsuko Sakata

IPC: H01L29/40 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

Abstract: According to some embodiments, a semiconductor device includes a substrate and an insulating film that is provided on the substrate. The device further includes a contact plug which includes a barrier metal layer provided in the insulating film, and a plug material layer provided in the insulating film, the barrier metal layer disposed between the plug material layer and the insulating film. The barrier metal layer includes at least a first layer including a first metal element and nitrogen, and a second layer including a second metal element different from the first metal element, and nitrogen.