公开(公告)号：US12046528B2

公开(公告)日：2024-07-23

申请号：US18136500

申请日：2023-04-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Wei Cheng ,  Chun-Hao Chou ,  Kuo-Cheng Lee ,  Ying-Hao Chen

IPC: H01L23/367 ,  H01L23/48 ,  H01L25/065

CPC classification number: H01L23/367 ,  H01L23/481 ,  H01L25/0657

Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.

公开(公告)号：US11810933B2

公开(公告)日：2023-11-07

申请号：US17010717

申请日：2020-09-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Feng-Chien Hsieh ,  Yun-Wei Cheng ,  Wei-Li Hu ,  Kuo-Cheng Lee ,  Ying-Hao Chen

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/14683

Abstract: A method for fabricating an image sensor device is provided. The method includes forming a plurality of photosensitive pixels in a substrate; depositing a dielectric layer over the substrate; etching the dielectric layer, resulting in a first trench in the dielectric layer and laterally surrounding the photosensitive pixels; and forming a light blocking structure in the first trench, such that the light blocking structure laterally surrounds the photosensitive pixels.

公开(公告)号：US09812569B2

公开(公告)日：2017-11-07

申请号：US14224961

申请日：2014-03-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： I-Chih Chen ,  Ying-Lang Wang ,  Chih-Mu Huang ,  Ying-Hao Chen ,  Wen-Chang Kuo ,  Jung-Chi Jeng

IPC: H01L29/78 ,  H01L29/167 ,  H01L29/08 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/66628 ,  H01L29/66636

Abstract: A semiconductor device and a method of fabricating the semiconductor device are provided. The semiconductor device includes a substrate; a source/drain region having a first dopant in the substrate; a barrier layer having a second dopant formed around the source/drain region in the substrate. When a semiconductor device is scaled down, the doped profile in source/drain regions might affect the threshold voltage uniformity, the provided semiconductor device may improve the threshold voltage uniformity by the barrier layer to control the doped profile.

公开(公告)号：US12113086B2

公开(公告)日：2024-10-08

申请号：US18232323

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Wei Cheng ,  Chun-Hao Chou ,  Kuo-Cheng Lee ,  Ying-Hao Chen

IPC: H01L27/146 ,  H01L31/0216 ,  H01L31/028

CPC classification number: H01L27/1463 ,  H01L31/02161 ,  H01L31/028

Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.

公开(公告)号：US20220384497A1

公开(公告)日：2022-12-01

申请号：US17816000

申请日：2022-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Chien HSIEH ,  Kuo-Cheng Lee ,  Ying-Hao Chen ,  Yun-Wei Cheng

IPC: H01L27/146

Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.

公开(公告)号：US20220310677A1

公开(公告)日：2022-09-29

申请号：US17841546

申请日：2022-06-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Wei Cheng ,  Chun-Hao Chou ,  Kuo-Cheng Lee ,  Ying-Hao Chen

IPC: H01L27/146 ,  H01L31/0216 ,  H01L31/028

Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.

公开(公告)号：US20210057517A1

公开(公告)日：2021-02-25

申请号：US16549835

申请日：2019-08-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Ting CHEN ,  Tsung-Han Tsai ,  Kun-Tsang Chuang ,  Po-Jen Wang ,  Ying-Hao Chen ,  Chien-Cheng Chuang

IPC: H01L49/02 ,  H01L21/02 ,  H01L21/3213

Abstract: The present disclosure relates to an apparatus that includes a bottom electrode and a dielectric structure. The dielectric structure includes a first dielectric layer on the bottom electrode and the first dielectric layer has a first thickness. The apparatus also includes a blocking layer on the first dielectric layer and a second dielectric layer on the blocking layer. The second dielectric layer has a second thickness that is less than the first thickness. The apparatus further includes a top electrode over the dielectric structure.

公开(公告)号：US10854530B1

公开(公告)日：2020-12-01

申请号：US16528207

申请日：2019-07-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yun-Wei Cheng ,  Chun-Hao Chou ,  Kuo-Cheng Lee ,  Ying-Hao Chen

IPC: H01L23/367 ,  H01L23/48 ,  H01L25/065

Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.

公开(公告)号：US10680103B2

公开(公告)日：2020-06-09

申请号：US15670978

申请日：2017-08-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L21/8238 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.

公开(公告)号：US09281215B2

公开(公告)日：2016-03-08

申请号：US14080368

申请日：2013-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L27/085 ,  H01L27/088 ,  H01L29/49 ,  H01L21/8238 ,  H01L21/3213 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/32135 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/8238 ,  H01L27/085 ,  H01L27/088 ,  H01L29/4238 ,  H01L29/49 ,  H01L29/4916 ,  H01L29/6659

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. The semiconductor device also includes an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device includes a gate over the semiconductor substrate. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion. Each of the end portions has a first gate length longer than a second gate length of the intermediate portion and is located over the isolation structure.

Abstract translation: 提供了用于形成半导体器件的机构的实施例。 半导体器件包括半导体衬底。 半导体器件还包括半导体衬底中的隔离结构并且围绕半导体衬底的有源区。 半导体器件包括半导体衬底上的栅极。 该栅极具有在有源区上方的中间部分和与该中间部分连接的两个端部。 每个端部具有长于中间部分的第二栅极长度的第一栅极长度并且位于隔离结构上方。