公开(公告)号：US12068396B2

公开(公告)日：2024-08-20

申请号：US18357307

申请日：2023-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jia-Heng Wang ,  Chun-Han Chen ,  I-Wen Wu ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L29/76 ,  H01L21/3213 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/94

CPC classification number: H01L29/66795 ,  H01L21/32136 ,  H01L21/823431 ,  H01L29/0653 ,  H01L29/7851

Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.

公开(公告)号：US11450572B2

公开(公告)日：2022-09-20

申请号：US16881979

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L21/8238 ,  H01L29/165 ,  H01L29/267 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/02 ,  H01L21/311 ,  H01L21/285 ,  H01L29/66 ,  H01L27/092 ,  H01L29/08

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having a upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

公开(公告)号：US11374104B2

公开(公告)日：2022-06-28

申请号：US16587474

申请日：2019-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L29/51 ,  H01L29/78 ,  H01L21/3105 ,  H01L21/02 ,  H01L29/40

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

公开(公告)号：US10797050B2

公开(公告)日：2020-10-06

申请号：US16596209

申请日：2019-10-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang ,  Jr-Hung Li ,  Bo-Cyuan Lu

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

Abstract: A FinFET device structure is provided. The FinFET device structure includes a first gate structure formed over a fin structure, and a first capping layer formed over the first gate structure. The FinFET device structure includes a first etching stop layer formed over the first capping layer and the first gate structure, and a top surface and a sidewall surface of the first capping layer are in direct contact with the first etching stop layer.

公开(公告)号：US10475788B2

公开(公告)日：2019-11-12

申请号：US15821970

申请日：2017-11-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang ,  Jr-Hung Li ,  Bo-Cyuan Lu

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate and a first gate structure formed over the fin structure. The FinFET device structure also includes a first capping layer formed over the first gate structure and a first etching stop layer over the first capping layer and the first gate structure. The FinFET device structure further includes a first source/drain (S/D) contact structure formed over the fin structure and adjacent to the first gate structure. A portion of the first etching stop layer which is directly above the first capping layer is higher than another portion of the first etching stop layer which is directly above the first gate spacer layer.

公开(公告)号：US12165929B2

公开(公告)日：2024-12-10

申请号：US17876083

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L27/092 ,  H01L29/08 ,  H01L29/165 ,  H01L29/267 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having an upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

公开(公告)号：US20240379459A1

公开(公告)日：2024-11-14

申请号：US18783030

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L27/092 ,  H01L29/08 ,  H01L29/165 ,  H01L29/267 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having an upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

公开(公告)号：US20240297236A1

公开(公告)日：2024-09-05

申请号：US18648069

申请日：2024-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/511 ,  H01L21/02271 ,  H01L21/31053 ,  H01L29/401 ,  H01L29/7851

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

公开(公告)号：US12057488B2

公开(公告)日：2024-08-06

申请号：US17850393

申请日：2022-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/511 ,  H01L21/02271 ,  H01L21/31053 ,  H01L29/401 ,  H01L29/7851

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

公开(公告)号：US20210366786A1

公开(公告)日：2021-11-25

申请号：US16881979

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Han Chen ,  Chen-Ming Lee ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L21/8238 ,  H01L29/08 ,  H01L29/165 ,  H01L29/267 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/02 ,  H01L21/311 ,  H01L21/285 ,  H01L29/66 ,  H01L27/092

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having a upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.