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公开(公告)号:US11822237B2
公开(公告)日:2023-11-21
申请号:US17071004
申请日:2020-10-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Ming-Hui Weng , Chen-Yu Liu , Chih-Cheng Liu , Yi-Chen Kuo , Jia-Lin Wei , Yen-Yu Chen , Jr-Hung Li , Yahru Cheng , Chi-Ming Yang , Tze-Liang Lee , Ching-Yu Chang
IPC: G03F7/004 , H01L21/033 , G03F7/00
CPC classification number: G03F7/004 , G03F7/0035 , H01L21/0332
Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
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公开(公告)号:US20230369048A1
公开(公告)日:2023-11-16
申请号:US18227231
申请日:2023-07-27
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Jia-Lin WEI , Ming-Hui Weng , Chih-Cheng Liu , Yi-Chen Kuo , Yen-Yu Chen , Yahru Cheng , Jr-Hung Li , Ching-Yu Chang , Tze-Liang Lee , Chi-Ming Yang
IPC: H01L21/033 , H01L21/308 , G03F7/00 , G03F1/22
CPC classification number: H01L21/0332 , H01L21/3081 , G03F7/70033 , G03F1/22 , H01L21/0334
Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.
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公开(公告)号:US11703762B2
公开(公告)日:2023-07-18
申请号:US16663237
申请日:2019-10-24
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chih-Tsung Shih , Chen-Ming Wang , Yahru Cheng , Bo-Tsun Liu , Tsung Chuan Lee
CPC classification number: G03F7/11 , G03F7/168 , G03F7/2004 , G03F7/38
Abstract: A method of generating a layout pattern includes disposing a photoresist layer of a resist material on a substrate and disposing a top layer over of the photoresist layer. The top layer is transparent for extreme ultraviolet (EUV) radiation and the top layer is opaque for deep ultraviolet (DUV) radiation. The method further includes irradiating the photoresist layer with radiation generated from an EUV radiation source. The radiation passes through the top layer to expose the photoresist layer.
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公开(公告)号:US11901189B2
公开(公告)日:2024-02-13
申请号:US16951955
申请日:2020-11-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong Tsai , Ya-Lun Chen , Tsai-Yu Huang , Yahru Cheng , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/3105 , H01L21/027 , G03F7/16 , H01L21/311
CPC classification number: H01L21/31058 , G03F7/162 , G03F7/168 , H01L21/0276 , H01L21/31144
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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公开(公告)号:US11276568B2
公开(公告)日:2022-03-15
申请号:US16732146
申请日:2019-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Ling Chang Chien , Chien-Chih Chen , Chin-Hsiang Lin , Ching-Yu Chang , Yahru Cheng
IPC: C09D125/06 , C09D125/18 , C09D133/12 , H01L21/02 , H01L21/027 , H01L21/311 , C09D125/16 , H01L21/768 , H01L21/033
Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed. A surface grafting layer is formed on the underlying structure. A photo resist layer is formed on the surface grafting layer. The surface grafting layer includes a coating material including a backbone polymer, a surface grafting unit coupled to the backbone polymer and an adhesion unit coupled to the backbone polymer.
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公开(公告)号:US11029602B2
公开(公告)日:2021-06-08
申请号:US15994615
申请日:2018-05-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: An-Ren Zi , Chin-Hsiang Lin , Ching-Yu Chang , Yahru Cheng
Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate, and selectively exposing the photoresist layer to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer, and the protective layer is removed. The protective layer includes a polymer having fluorocarbon pendant groups.
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公开(公告)号:US12271113B2
公开(公告)日:2025-04-08
申请号:US17150389
申请日:2021-01-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chih-Cheng Liu , Yi-Chen Kuo , Jia-Lin Wei , Ming-Hui Weng , Yen-Yu Chen , Jr-Hung Li , Yahru Cheng , Chi-Ming Yang , Tze-Liang Lee , Ching-Yu Chang
IPC: G03F7/16 , G03F7/11 , H01L21/027 , G03F7/20
Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1≤a≤2, b≥1, c≥1, and b+c≤5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.
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公开(公告)号:US11942322B2
公开(公告)日:2024-03-26
申请号:US17226872
申请日:2021-04-09
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: An-Ren Zi , Chun-Chih Ho , Yahru Cheng , Ching-Yu Chang
IPC: H01L21/033 , G03F7/00 , G03F7/20 , H01L21/308
CPC classification number: H01L21/0334 , G03F7/70033 , H01L21/3083
Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.
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公开(公告)号:US11003082B2
公开(公告)日:2021-05-11
申请号:US16027680
申请日:2018-07-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chien-Chih Chen , Yahru Cheng , Ching-Yu Chang
IPC: G03F7/38 , H01L21/027 , G03F7/004 , H01L21/311 , H01L21/306 , H01L21/266 , H01L21/308 , H01L21/8234 , H01L21/3213 , H01L21/3215 , H01L21/3115 , H01L21/265 , G03F7/16 , G03F7/32 , G03F7/20 , G03F7/038 , G03F7/039 , G03F7/095 , G03F7/09 , G03F7/075 , H01L29/66
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and providing a resist solution. The resist solution includes a plurality of first polymers and a plurality of second polymers, each of the first polymers includes a first polymer backbone, and a first acid-labile group (ALG) with a first activation energy bonded to the first polymer backbone. Each of the second polymers includes a second polymer backbone, and a second acid-labile group with a second activation energy bonded to the second polymer backbone, the second activation energy is greater than the first activation energy. The method includes forming a resist layer over the material layer, and the resist layer includes a top portion and a bottom portion, and the first polymers diffuse to the bottom portion, and the second polymers diffuse to the top portion.
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公开(公告)号:US10770293B2
公开(公告)日:2020-09-08
申请号:US16105934
申请日:2018-08-20
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Chung Su , Yahru Cheng , Ching-Yu Chang
IPC: H01L21/027 , G03F7/16 , H01L21/033 , H01L21/768 , H01L21/311
Abstract: In a method of manufacturing a semiconductor device, a photo resist layer is formed over a substrate with underlying structures. The first photo resist layer is exposed to exposure radiation. The exposed first photo resist layer is developed with a developing solution. A planarization layer is formed over the developed photo resist layer. The underlying structures include concave portions, and a part of the concave portions is not filled by the developed first photo resist.
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