公开(公告)号：US12106961B2

公开(公告)日：2024-10-01

申请号：US17581671

申请日：2022-01-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： An-Ren Zi ,  Yahru Cheng ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: H01L21/027 ,  G03F7/32 ,  H01L21/308

CPC classification number: H01L21/0274 ,  H01L21/3081

Abstract: A method for forming a semiconductor device is provided. The method includes applying a photoresist composition over a substrate, thereby forming a photoresist layer over the substrate; performing a first baking process to the photoresist layer; exposing the photoresist layer to an extreme ultraviolet (EUV) radiation, thereby forming a pattern therein; performing a second baking process to the photoresist layer; and developing the photoresist layer having the pattern therein using a developer, thereby forming a patterned photoresist layer. The first baking process and the second baking process are conducted under an ambient atmosphere having a humidity level ranging from 55% to 100%.

公开(公告)号：US12002675B2

公开(公告)日：2024-06-04

申请号：US17156365

申请日：2021-01-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Yu Chen ,  Chih-Cheng Liu ,  Yi-Chen Kuo ,  Jr-Hung Li ,  Tze-Liang Lee ,  Ming-Hui Weng ,  Yahru Cheng

IPC: H01L21/027 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/0274 ,  H01L21/3086 ,  H01L21/31144

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.

公开(公告)号：US11705332B2

公开(公告)日：2023-07-18

申请号：US17150403

申请日：2021-01-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Chen Kuo ,  Chih-Cheng Liu ,  Ming-Hui Weng ,  Jia-Lin Wei ,  Yen-Yu Chen ,  Jr-Hung Li ,  Yahru Cheng ,  Chi-Ming Yang ,  Tze-Liang Lee ,  Ching-Yu Chang

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/02

CPC classification number: H01L21/0275 ,  H01L21/0228 ,  H01L21/02362

Abstract: A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

公开(公告)号：US11626482B2

公开(公告)日：2023-04-11

申请号：US17192134

申请日：2021-03-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Ting Chen ,  Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tsu-Hsiu Perng ,  Tsai-Jung Ho ,  Tsung-Han Ko ,  Tetsuji Ueno ,  Yahru Cheng

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/768 ,  H01L29/49

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

公开(公告)号：US10529552B2

公开(公告)日：2020-01-07

申请号：US15905501

申请日：2018-02-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Ling Chang Chien ,  Chien-Chih Chen ,  Chin-Hsiang Lin ,  Ching-Yu Chang ,  Yahru Cheng

IPC: H01L21/02 ,  H01L21/311 ,  C09D125/06 ,  C09D133/12 ,  C09D125/16 ,  H01L21/027 ,  H01L21/768 ,  H01L21/033 ,  C09D125/18

Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed. A surface grafting layer is formed on the underlying structure. A photo resist layer is formed on the surface grafting layer. The surface grafting layer includes a coating material including a backbone polymer, a surface grafting unit coupled to the backbone polymer and an adhesion unit coupled to the backbone polymer.

公开(公告)号：US12272554B2

公开(公告)日：2025-04-08

申请号：US18227231

申请日：2023-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Lin Wei ,  Ming-Hui Weng ,  Chih-Cheng Liu ,  Yi-Chen Kuo ,  Yen-Yu Chen ,  Yahru Cheng ,  Jr-Hung Li ,  Ching-Yu Chang ,  Tze-Liang Lee ,  Chi-Ming Yang

IPC: H01L21/033 ,  G03F1/22 ,  G03F7/00 ,  H01L21/308

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

公开(公告)号：US12087592B2

公开(公告)日：2024-09-10

申请号：US18446416

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Fong Tsai ,  Ya-Lun Chen ,  Tsai-Yu Huang ,  Yahru Cheng ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/3105 ,  G03F7/16 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L21/31058 ,  G03F7/162 ,  G03F7/168 ,  H01L21/0276 ,  H01L21/31144

Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.

公开(公告)号：US11784046B2

公开(公告)日：2023-10-10

申请号：US17150356

申请日：2021-01-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jia-Lin Wei ,  Ming-Hui Weng ,  Chih-Cheng Liu ,  Yi-Chen Kuo ,  Yen-Yu Chen ,  Yahru Cheng ,  Jr-Hung Li ,  Ching-Yu Chang ,  Tze-Liang Lee ,  Chi-Ming Yang

IPC: H01L21/033 ,  H01L21/308 ,  G03F7/20 ,  G03F1/22 ,  G03F7/00

CPC classification number: H01L21/0332 ,  G03F1/22 ,  G03F7/70033 ,  H01L21/0334 ,  H01L21/3081

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

公开(公告)号：US20210272816A1

公开(公告)日：2021-09-02

申请号：US16951955

申请日：2020-11-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Fong Tsai ,  Ya-Lun Chen ,  Tsai-Yu Huang ,  Yahru Cheng ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/3105 ,  H01L21/027 ,  H01L21/311 ,  G03F7/16

Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.

公开(公告)号：US12094952B2

公开(公告)日：2024-09-17

申请号：US18297831

申请日：2023-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Ting Chen ,  Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tsu-Hsiu Perng ,  Tsai-Jung Ho ,  Tsung-Han Ko ,  Tetsuji Ueno ,  Yahru Cheng

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/4991 ,  H01L29/0653 ,  H01L29/6656

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.