公开(公告)号：US20190371838A1

公开(公告)日：2019-12-05

申请号：US16113101

申请日：2018-08-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Seiji Takahashi ,  Chen-Jong Wang ,  Dun-Nian Yaung ,  Feng-Chi Hung ,  Feng-Jia Shiu ,  Jen-Cheng Liu ,  Jhy-Jyi Sze ,  Chun-Wei Chang ,  Wei-Cheng Hsu ,  Wei Chuang Wu ,  Yimin Huang

IPC: H01L27/146

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

公开(公告)号：US09768218B2

公开(公告)日：2017-09-19

申请号：US14836019

申请日：2015-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yimin Huang ,  Jhy-Jyi Sze ,  Alexander Kalnitsky

IPC: H01L27/14 ,  H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14614 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: A pixel sensor device is disclosed. The device includes a shallow trench isolation structure, a well region and a backside isolation structure. The well region and diode region is adjacent to the shallow trench isolation structure. The backside isolation structure is self-aligned with and arranged over the shallow trench isolation structure. The backside isolation structure is adjacent to the diode region.An immersion lithographic arrangement is disclosed that compensates for immersion tool drift.

公开(公告)号：US11574940B2

公开(公告)日：2023-02-07

申请号：US17324442

申请日：2021-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yimin Huang

IPC: H01L27/146 ,  H01L49/02

Abstract: Various embodiments of the present disclosure are directed towards a capacitor structure comprising a plurality of first conductive layers that are vertically stacked over one another and overlie a substrate. The plurality of first conductive layers respectively contact an adjacent first conductive layer in a first connection region. A plurality of second conductive layers are respectively stacked between adjacent ones of the plurality of first conductive layers. The plurality of second conductive layers respectively contact an adjacent second conductive layer in a second connection region. A dielectric structure separates the plurality of first conductive layers and the plurality of second conductive layers. At least a portion of a lower first conductive layer in the plurality of first conductive layers directly underlies the second connection region.

公开(公告)号：US11538837B2

公开(公告)日：2022-12-27

申请号：US17308332

申请日：2021-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Seiji Takahashi ,  Chen-Jong Wang ,  Dun-Nian Yaung ,  Feng-Chi Hung ,  Feng-Jia Shiu ,  Jen-Cheng Liu ,  Jhy-Jyi Sze ,  Chun-Wei Chang ,  Wei-Cheng Hsu ,  Wei Chuang Wu ,  Yimin Huang

IPC: H01L27/146

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

公开(公告)号：US20210265412A1

公开(公告)日：2021-08-26

申请号：US17236343

申请日：2021-04-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tung-Ting Wu ,  Jhy-Jyi Sze ,  Yimin Huang

IPC: H01L27/146

Abstract: The present disclosure, in some embodiments, relates to an image sensing integrated chip. The image sensing integrated chip includes a semiconductor substrate having sidewalls defining one or more trenches on opposing sides of a region of the semiconductor substrate. One or more dielectrics are disposed within the one or more trenches. The semiconductor substrate has a plurality of flat surfaces arranged between the one or more trenches. Adjacent ones of the plurality of flat surfaces define a plurality of triangular shaped protrusions and alternative ones of the plurality of flat surfaces are substantially parallel to one another, as viewed along a cross-sectional view.

公开(公告)号：US11004880B2

公开(公告)日：2021-05-11

申请号：US17022456

申请日：2020-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Seiji Takahashi ,  Chen-Jong Wang ,  Dun-Nian Yaung ,  Feng-Chi Hung ,  Feng-Jia Shiu ,  Jen-Cheng Liu ,  Jhy-Jyi Sze ,  Chun-Wei Chang ,  Wei-Cheng Hsu ,  Wei Chuang Wu ,  Yimin Huang

IPC: H01L27/146

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

公开(公告)号：US20170323913A1

公开(公告)日：2017-11-09

申请号：US15658588

申请日：2017-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yimin Huang ,  Jhy-Jyi Sze ,  Alexander Kalnitsky

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14614 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: A pixel sensor device is disclosed. The device includes a shallow trench isolation structure, a well region and a backside isolation structure. The well region and diode region is adjacent to the shallow trench isolation structure. The backside isolation structure is self-aligned with and arranged over the shallow trench isolation structure. The backside isolation structure is adjacent to the diode region.

公开(公告)号：US11139367B2

公开(公告)日：2021-10-05

申请号：US16365904

申请日：2019-03-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Seiji Takahashi ,  Chen-Jong Wang ,  Dun-Nian Yaung ,  Jung-I Lin ,  Jhy-Jyi Sze ,  Alexander Kalnitsky ,  Yimin Huang ,  King Liao ,  Shen-Hui Hong

IPC: H01L49/02 ,  H01L21/768

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.

公开(公告)号：US20210272991A1

公开(公告)日：2021-09-02

申请号：US17324442

申请日：2021-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yimin Huang

IPC: H01L27/146 ,  H01L49/02

Abstract: Various embodiments of the present disclosure are directed towards a capacitor structure comprising a plurality of first conductive layers that are vertically stacked over one another and overlie a substrate. The plurality of first conductive layers respectively contact an adjacent first conductive layer in a first connection region. A plurality of second conductive layers are respectively stacked between adjacent ones of the plurality of first conductive layers. The plurality of second conductive layers respectively contact an adjacent second conductive layer in a second connection region. A dielectric structure separates the plurality of first conductive layers and the plurality of second conductive layers. At least a portion of a lower first conductive layer in the plurality of first conductive layers directly underlies the second connection region.

公开(公告)号：US11075242B2

公开(公告)日：2021-07-27

申请号：US15962130

申请日：2018-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Chia Kuo ,  Jhy-Jyi Sze ,  Tung-Ting Wu ,  Yimin Huang

IPC: H01L27/146 ,  H01L31/0236 ,  H01L31/0232

Abstract: The present disclosure relates to a semiconductor device having a lateral resonance structure to coherently reflect light toward the image sensor. The semiconductor device includes an image sensing element arranged within a substrate. A radiation absorption region is arranged within the substrate and above the image sensor, and contains an array of protrusions having a characteristic dimension and an outer border. A resonant structure containing a plurality of deep trench isolation (DTI) structures is disposed on opposing sides of the image sensing element. The (DTI) structures surround the outer border of the array of protrusions. An inner surface of the DTI structure is laterally spaced apart from the outer border of the array of protrusions by a reflective length based on the characteristic dimension of the array of protrusions, thus affecting coherent reflection of light back toward the image sensor.