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    Photo diode with dual backside deep trench isolation depth
    1.
    发明授权
    Photo diode with dual backside deep trench isolation depth 有权

    公开(公告)号：US11600644B2

    公开(公告)日：2023-03-07

    申请号：US17070543

    申请日：2020-10-14

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yimin Huang

    IPC分类号： H01L27/146

    摘要： In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.

    Metal-insulator-metal capacitor structure to increase capacitance density
    4.
    发明授权
    Metal-insulator-metal capacitor structure to increase capacitance density 有权

    公开(公告)号：US11018169B2

    公开(公告)日：2021-05-25

    申请号：US16543859

    申请日：2019-08-19

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yimin Huang

    IPC分类号： H01L27/146 ,  H01L49/02

    摘要： Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a capacitor. The capacitor is over a substrate and includes a first electrode having a plurality of first electrode layers that are vertically stacked over one another. The plurality of first electrode layers respectively contact an adjacent first electrode layer in a plurality of first connection regions. A second electrode including a plurality of second electrode layers that are vertically stacked over one another. The plurality of second electrode layers respectively contact an adjacent second electrode layer in a plurality of second connection regions. The plurality of second electrode layers are respectively stacked between adjacent ones of the plurality of first electrode layers. A capacitor dielectric structure separates the plurality of first electrode layers and the plurality of second electrode layers.

    High performance image sensor
    5.
    发明授权
    High performance image sensor 有权

    公开(公告)号：US10991746B2

    公开(公告)日：2021-04-27

    申请号：US16352164

    申请日：2019-03-13

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Tung-Ting Wu ,  Jhy-Jyi Sze ,  Yimin Huang

    IPC分类号： H01L27/146 ,  H01L31/036

    摘要： The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensing element disposed within a pixel region of a substrate. A plurality of conductive interconnect layers are disposed within a dielectric structure arranged along a first side of the substrate. A second side of the substrate includes a plurality of interior surfaces arranged directly over the image sensing element. The plurality of interior surfaces respectively include a substantially flat surface that extends along a plane.

    METAL-INSULATOR-METAL CAPACITOR STRUCTURE TO INCREASE CAPACITANCE DENSITY
    6.
    发明申请
    METAL-INSULATOR-METAL CAPACITOR STRUCTURE TO INCREASE CAPACITANCE DENSITY 有权

    公开(公告)号：US20210057469A1

    公开(公告)日：2021-02-25

    申请号：US16543859

    申请日：2019-08-19

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yimin Huang

    IPC分类号： H01L27/146 ,  H01L49/02

    摘要： Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a capacitor. The capacitor is over a substrate and includes a first electrode having a plurality of first electrode layers that are vertically stacked over one another. The plurality of first electrode layers respectively contact an adjacent first electrode layer in a plurality of first connection regions. A second electrode including a plurality of second electrode layers that are vertically stacked over one another. The plurality of second electrode layers respectively contact an adjacent second electrode layer in a plurality of second connection regions. The plurality of second electrode layers are respectively stacked between adjacent ones of the plurality of first electrode layers. A capacitor dielectric structure separates the plurality of first electrode layers and the plurality of second electrode layers.

    VERTICAL TRANSFER GATE STRUCTURE FOR A BACK-SIDE ILLUMINATION (BSI) COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR USING GLOBAL SHUTTER CAPTURE
    8.
    发明申请
    VERTICAL TRANSFER GATE STRUCTURE FOR A BACK-SIDE ILLUMINATION (BSI) COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR USING GLOBAL SHUTTER CAPTURE 有权
    用于背面照明的垂直转移门结构（BSI）使用全局快门捕获的补充金属氧化物半导体（CMOS）图像传感器

    公开(公告)号：US20160343751A1

    公开(公告)日：2016-11-24

    申请号：US14835983

    申请日：2015-08-26

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Jhy-Jyi Sze ,  Alexander Kalnitsky ,  Yimin Huang

    IPC分类号： H01L27/146

    CPC分类号： H01L27/1464 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/1463 ,  H01L27/14638 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14656 ,  H01L27/14685 ,  H01L27/14689

    摘要： A back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A semiconductor column extends vertically from a photodetector, towards a back-end-of-line (BEOL) stack. A floating diffusion region (FDR) is vertically spaced from the photodetector by the semiconductor column. The FDR comprises a sidewall surface laterally offset from a neighboring sidewall surface of the semiconductor column to define a lateral recess between the FDR and the photodetector. A gate dielectric layer lines the sidewall surface of the semiconductor column and is arranged in the lateral recess. A gate is arranged laterally adjacent to the gate dielectric layer and filling the lateral recess. Further, a method for manufacturing the vertical transfer gate structure is provided.

    摘要翻译： 提供了使用垂直传输门结构来提高量子效率（QE）和全局快门效率（GSE）的背面照明（BSI）互补金属氧化物半导体（CMOS）图像传感器。 半导体柱从光电检测器垂直延伸到后端（BEOL）堆叠。 浮动扩散区域（FDR）通过半导体柱与光电检测器垂直间隔开。 FDR包括从半导体柱的相邻侧壁表面横向偏移的侧壁表面，以在FDR和光电检测器之间限定横向凹槽。 栅极电介质层配置在半导体柱的侧壁表面并且布置在横向凹槽中。 栅极被布置成横向邻近栅极电介质层并填充侧向凹槽。 此外，提供了一种用于制造垂直传输门结构的方法。

    DEVICE CRACK-STOP STRUCTURE TO PREVENT DAMAGE DUE TO DICING CRACK
    9.
    发明申请
    DEVICE CRACK-STOP STRUCTURE TO PREVENT DAMAGE DUE TO DICING CRACK 有权

    公开(公告)号：US20210098392A1

    公开(公告)日：2021-04-01

    申请号：US16589460

    申请日：2019-10-01

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Tung-Ting Wu ,  Chen-Jong Wang ,  Jen-Cheng Liu ,  Yimin Huang ,  Chin-Chia Kuo

    IPC分类号： H01L23/58 ,  H01L27/146

    摘要： Various embodiments of the present disclosure are directed towards a semiconductor structure including a crack-stop structure disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. Photodetectors are disposed within the semiconductor substrate and are laterally spaced within a device region. An interconnect structure is disposed along the front-side surface. The interconnect structure includes a seal ring structure. A crack-stop structure is disposed within the semiconductor substrate and overlies the seal ring structure. The crack-stop structure continuously extends around the device region.