Abstract:
An apparatus is provided. A comparison circuit is configured to receive an analog signal. A reference circuit is coupled to the comparison circuit and is configured to provide a plurality of reference signals to the comparison circuit. A conversion circuit is coupled to the comparison circuit and is configured to detect a change in the output of the comparison circuit. A time-to-digital converter (TDC) is coupled to the comparison circuit. A timer is coupled to the comparison circuit. A rate control circuit is coupled to the conversion circuit. An output circuit is coupled to the rate control circuit and the TDC, where the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal.
Abstract:
A method of performing wireless communications. The method comprises, at a transmitting station, encoding a plurality of symbols into a frame. The method further comprises, from the transmitting station, transmitting the frame via a wireless communication to a receiving station. The frame comprises a plurality of sub-frames, wherein a first sub-frame in the plurality of sub-frames consists of a first number of symbols and a second sub-frame in the plurality of sub-frames consists of a second number of symbols. Finally, the first number differs from the second number.
Abstract:
An integrated circuit 18 is provided that includes a memory 32 and a memory modification component 33. The memory 32 maintains a bits count, a gain, and a tone order for each of a plurality of discrete multi-tone sub-channels. The memory modification component 33 operable to control an in-service modification of at least some of the bits count, the gain, and the tone order using a single bits, gains and tone order table.
Abstract:
Systems for color Doppler imaging in an ultrasound imaging system are disclosed herein. An ultrasound imaging system includes color Doppler imaging circuitry. The color Doppler imaging circuitry is configured to estimate flow parameters. The imaging circuitry includes a radio frequency (“RF”) demodulator configured to produce in-phase and quadrature components of an ultra-sound data vector. The RF demodulator includes a table in memory that stores interleaved sine and cosine values. The RF demodulator maintains an index value for the table having higher precision than is used to index the table. The RF demodulator rounds the index value for each access of the table. Each table access retrieves a sine value and a cosine value.
Abstract:
A system for processing real-time fluoroscopy image sequences. A first image frame is loaded into an upper level memory of a hierarchical memory system that is coupled to at least one processing core. The first image frame is processed with an object detection filter to form a likelihood image frame. The first image frame and the likelihood image frame is spatially filtered using a spatial filter look up table (LUT) stored in an L1 level memory of the processing core. The likelihood image frame is temporally filtering using a temporal filter LUT stored in the L1 level memory.
Abstract:
The present invention provides an apparatus, system and method for synchronizing a local clock signal with a remote clock signal in a communication network. Phase information is used to calculate a number of “clock jitters” per unit of time needed to synchronize the locally generated clock with the remote clock. Introducing (removing) a given amount of delay at a particular point in the local clock signal results in a positive (negative) jitter in which its minimum value defines the jitter resolution. The jitters are introduced to the local clock signal from a plurality of tapped delay line elements (310) selected by a phase selector (350) in response to a timing correction signal issued by a phase error module (520).
Abstract:
Systems and methods are disclosed for providing automatic gain control of a multi-stage system. A method can include defining at least one parameter that is adapted to at least one of maximize hardware capacity of each of a plurality of gain stages and mitigate part-to-part variations of the multi-stage system. An order is selected for training the plurality of stages based on relative noise dominance for the plurality of stage. For a given stage of the plurality of stages, which is selected according to the selected order, output signals of the multi-stage system are measured over a plurality of gain settings for the given stage. A gain setting of the given stage of the multi-stage system also is configured based on the measured output signals relative to the at least one parameter defined for the given stage. The plurality of gain stages can include an analog equalizer as well programmable gain amplifiers connected in series.
Abstract:
A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. If the comparison result remains substantially the same for a predetermined interval, an ADC is enabled to generate a second comparison result at a sampling instant. A second time stamp that corresponds to the sampling instant is generated. The second comparison result and a second time stamp corresponding to the first comparison result are registered, and a second portion of the digital signal is generated from the second comparison result.
Abstract:
A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. At least one of the first and second reference signals is adjusted. A second comparison result is generated if the analog signal reaches an adjusted one of the first and second reference signals within a predetermined interval, and a second portion of the digital signal is generated from the second comparison result.
Abstract:
A client premises digital subscriber line (DSL) modem having multi-mode capability is disclosed. In initialization, the modem estimates whether channel conditions are such that digital processing of the received data according to a lower data rate DSL standard, such as ADSL2, may result in a higher effective data rate than receipt and processing according to a higher data rate DSL standard, such as ADSL2+. If so, the DSL modem configures itself, such as by configuring its filter characteristics and sampling frequency, to receive and process data according to the lower data rate DSL standard; the transmitting modem, for example at a central office or service area interface, may continue to operate according to the higher data rate standard (with its bit loading corresponding to a subset of subchannels). The receiving DSL modem processes the payload data according to the lower standard, while processing control messages according to the higher standard.