公开(公告)号：US20180201498A1

公开(公告)日：2018-07-19

申请号：US15921203

申请日：2018-03-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Sheng Lin ,  Weng-Yi Chen ,  Kuan-Yu Wang ,  Chih-Wei Liu

IPC: B81B3/00 ,  H04R19/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2201/0257 ,  B81B2207/115 ,  B81C1/00158 ,  B81C1/00785 ,  H04R19/005 ,  H04R19/04 ,  H04R2201/003 ,  H04R2307/027

Abstract: A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

公开(公告)号：US09950920B2

公开(公告)日：2018-04-24

申请号：US15003913

申请日：2016-01-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Sheng Lin ,  Weng-Yi Chen ,  Kuan-Yu Wang ,  Chih-Wei Liu

IPC: B81B3/00 ,  B81C1/00 ,  H04R19/00

CPC classification number: B81B3/0075 ,  B81B2201/0257 ,  B81B2207/115 ,  B81C1/00158 ,  B81C1/00785 ,  H04R19/005 ,  H04R19/04 ,  H04R2201/003 ,  H04R2307/027

Abstract: A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

公开(公告)号：US20170210615A1

公开(公告)日：2017-07-27

申请号：US15003913

申请日：2016-01-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Sheng Lin ,  Weng-Yi Chen ,  Kuan-Yu Wang ,  Chih-Wei Liu

IPC: B81B3/00 ,  H04R19/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2201/0257 ,  B81B2207/115 ,  B81C1/00158 ,  B81C1/00785 ,  H04R19/005 ,  H04R19/04 ,  H04R2201/003 ,  H04R2307/027

Abstract: A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

公开(公告)号：US09499399B2

公开(公告)日：2016-11-22

申请号：US13917655

申请日：2013-06-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Che Chen ,  Te-Yuan Wu ,  Chia-Huei Lin ,  Hui-Min Wu ,  Kun-Che Hsieh ,  Kuan-Yu Wang ,  Chung-Yi Chiu

IPC: B81C1/00 ,  H01L21/302 ,  H01L21/461

CPC classification number: B81B3/0075 ,  B81B2207/07 ,  B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.

Abstract translation: 一种形成MEMS结构的方法，其中形成蚀刻停止层以埋入介电层内，并且在从背面蚀刻基板和介电层之间形成室时，蚀刻停止层 保护剩余的介电层。 如此形成的室在基板的背面具有开口，与开口相对的天花板和连接天花板的侧壁。 侧壁还可包括蚀刻停止层的一部分。

公开(公告)号：US20160212551A1

公开(公告)日：2016-07-21

申请号：US14630620

申请日：2015-02-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chang-Sheng Hsu ,  Yuan-Sheng Lin ,  Wei-Hua Fang ,  Kuan-Yu Wang ,  Yan-Da Chen

IPC: H04R23/00 ,  B81B3/00

CPC classification number: H04R23/00 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00182 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R2201/003

Abstract: A microelectromechanical system microphone includes a semiconductor-on-insulator structure, a plurality of resistors, a plurality of first openings, and a vent hole. The semiconductor-on-insulator structure includes a substrate, an insulating layer and a semiconductor layer. The resistors are formed in the semiconductor layer, the first openings are formed in the semiconductor layer, and the vent hole is formed in the insulating layer and the substrate. The resistors are connected to each other to form a resistor pattern, and the first openings are all formed within the resistor pattern.

Abstract translation: 微机电系统麦克风包括绝缘体上半导体结构，多个电阻器，多个第一开口和通气孔。 绝缘体上半导体结构包括衬底，绝缘层和半导体层。 电阻器形成在半导体层中，第一开口形成在半导体层中，并且通气孔形成在绝缘层和基板中。 电阻器彼此连接以形成电阻器图案，并且第一开口都形成在电阻器图案内。

公开(公告)号：US20150011035A1

公开(公告)日：2015-01-08

申请号：US13933135

申请日：2013-07-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Yu Wang ,  Hui-Min Wu ,  Kun-Che Hsieh

IPC: B81C1/00

CPC classification number: B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C2203/0742

Abstract: A method for fabricating an integrated device includes the following steps. First, a multi-layered structure is formed on a substrate, wherein the multi-layered structure is embedded in a lower isolation layer. Then, a bottom conductive pattern and a top conductive pattern are formed on a top surface of the lower isolation layer, wherein the top conductive pattern is on a top surface of the bottom conductive pattern. Afterwards, portions of the top conductive pattern are removed to expose portions of the bottom conductive pattern. Subsequently, an upper isolation layer is deposited on the lower isolation layer so that the upper isolation layer can be in direct contact with the portions of the bottom conductive pattern. Finally, portions of the lower isolation layer and the upper isolation layer are removed so as to expose portions of the substrate.

Abstract translation: 一种用于制造集成装置的方法包括以下步骤。 首先，在基板上形成多层结构，其中多层结构被嵌入在下隔离层中。 然后，在下隔离层的顶表面上形成底部导电图案和顶部导电图案，其中顶部导电图案位于底部导电图案的顶表面上。 之后，顶部导电图案的部分被去除以暴露底部导电图案的部分。 随后，上隔离层沉积在下隔离层上，使得上隔离层可以与底导电图案的部分直接接触。 最后，去除下隔离层和上隔离层的部分以露出基板的部分。

公开(公告)号：US20140367805A1

公开(公告)日：2014-12-18

申请号：US13917655

申请日：2013-06-14

Applicant: United Microelectronics Corp.

Inventor： Li-Che Chen ,  Te-Yuan Wu ,  Chia-Huei Lin ,  Hui-Min Wu ,  Kun-Che Hsieh ,  Kuan-Yu Wang ,  Chung-Yi Chiu

IPC: B81C1/00

CPC classification number: B81B3/0075 ,  B81B2207/07 ,  B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.

Abstract translation: 一种形成MEMS结构的方法，其中形成蚀刻停止层以埋入介电层内，并且在从背面蚀刻基板和介电层之间形成室时，蚀刻停止层 保护剩余的介电层。 如此形成的室在基板的背面具有开口，与开口相对的天花板和连接天花板的侧壁。 侧壁还可包括蚀刻停止层的一部分。