Method of efficiently loading scan and non-scan memory elements
    11.
    发明申请
    Method of efficiently loading scan and non-scan memory elements 失效
    有效地加载扫描和非扫描存储元件的方法

    公开(公告)号:US20050033898A1

    公开(公告)日:2005-02-10

    申请号:US10636984

    申请日:2003-08-07

    IPC分类号: G11C5/00 G11C29/32

    CPC分类号: G11C29/32 G11C2029/3202

    摘要: The present invention provides a method and apparatus for efficiently loading values into scan and non-scan memory elements. First, the network used to distribute control signals to the memory elements is cleared. Second, the desired values are loaded into the scan memory elements. Third, the values from the scan memory elements are propagated to the non-scan memory elements.

    摘要翻译: 本发明提供了一种用于将值有效地加载到扫描和非扫描存储器元件中的方法和装置。 首先,用于将控制信号分配给存储器元件的网络被清除。 其次,将期望的值加载到扫描存储器元件中。 第三,来自扫描存储器元件的值被传播到非扫描存储器元件。

    Wafer probe for measuring plasma and surface characteristics in plasma processing environments
    12.
    发明申请
    Wafer probe for measuring plasma and surface characteristics in plasma processing environments 审中-公开
    用于测量等离子体处理环境中的等离子体和表面特性的晶圆探针

    公开(公告)号:US20050011611A1

    公开(公告)日:2005-01-20

    申请号:US10920138

    申请日:2004-08-17

    IPC分类号: H01J37/32 H01L21/00 C23F1/00

    CPC分类号: H01J37/32935 H01L21/67253

    摘要: There is provided by this invention a wafer probe for measuring plasma and surface characteristics in plasma processing environment that utilizes integrated sensors on a wafer substrate. A microprocessor mounted on the substrate receives input signals from the integrated sensors to process, store, and transmit the data. A wireless communication transceiver receives the data from the microprocessor and transmits information outside of the plasma processing system to a computer that collects the data during plasma processing. The integrated sensors may be dual floating Langmuir probes, temperature measuring devices, resonant beam gas sensors, optical emission sensors, or other sensors of plasma or surface properties. There is also provided a self-contained power source that utilizes the plasma for power that is comprised of a topographically dependent charging device or a charging structure that utilizes stacked capacitors.

    摘要翻译: 本发明提供一种用于测量在晶片衬底上利用集成传感器的等离子体处理环境中的等离子体和表面特性的晶片探针。 安装在基板上的微处理器从集成传感器接收输入信号以处理,存储和发送数据。 无线通信收发器从微处理器接收数据并将等离子体处理系统外的信息传送到在等离子体处理期间收集数据的计算机。 集成传感器可以是双浮动Langmuir探针,温度测量装置,谐振束气体传感器,光发射传感器或其他等离子体或表面性质的传感器。 还提供了一种独立的电源,其利用由等离子体构成的地形学依赖的充电装置或利用堆叠的电容器的充电结构。

    BEVERAGE PITCHER COLD PLATE STATION
    14.
    发明申请
    BEVERAGE PITCHER COLD PLATE STATION 审中-公开
    饮料搅拌机冷板站

    公开(公告)号:US20080173041A1

    公开(公告)日:2008-07-24

    申请号:US12053650

    申请日:2008-03-24

    申请人: Steven Roberts

    发明人: Steven Roberts

    IPC分类号: F25D3/08 F25D3/00

    摘要: A container and cold plate combination that keeps liquids cold includes a pitcher made from a pitcher housing material, or having outside and/or inside metallic liners that are integral to the pitcher bottom which is metallic and configured to be in direct surface contact with an underlying cold plate of a cold plate station system. The cold plate lowers the temperature of the metallic liners or pitcher housing and the cold is transferred to a liquid in the container.

    摘要翻译: 保持液体冷的容器和冷板组合包括由投手外壳材料制成的投手,或具有与投手底部成一体的金属衬里和/或内部的金属衬里,所述金属衬套是金属的,并且构造成与底层的直接表面接触 冷板站冷系统。 冷板降低金属衬套或投手壳体的温度,并将冷却物转移到容器中的液体中。

    System and Method for Test Generation for System Level Verification Using Parallel Algorithms
    15.
    发明申请
    System and Method for Test Generation for System Level Verification Using Parallel Algorithms 失效
    使用并行算法进行系统级验证的测试生成系统和方法

    公开(公告)号:US20070233765A1

    公开(公告)日:2007-10-04

    申请号:US11758357

    申请日:2007-06-05

    IPC分类号: G06F17/11

    CPC分类号: G06F11/263

    摘要: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.

    摘要翻译: 提供了一种使用并行算法进行系统级验证的测试生成系统和方法。 本发明通过利用并行算法的可扩展性同时允许数据集着色和预期结果检查来生成用于系统级测试的测试模式。 基于被测系统的特征,从多个可能的并行算法中选择迭代并行算法。 然后将所选择的并行算法分离成单独的程序语句以供多个处理器执行。 执行所选算法的串行版本以产生一组预期结果。 然后运行所选算法的设计的并行版本以生成与一组预期结果进行比较的一组测试结果数据。 如果两组数据匹配,则确定系统正常运行。

    METHOD AND EQUIPMENT FOR THE CONTINUOUS PRODUCTION OF A POROUS POWDERED PRODUCT
    17.
    发明申请
    METHOD AND EQUIPMENT FOR THE CONTINUOUS PRODUCTION OF A POROUS POWDERED PRODUCT 审中-公开
    连续生产多孔粉末产品的方法和设备

    公开(公告)号:US20100104718A1

    公开(公告)日:2010-04-29

    申请号:US12445674

    申请日:2007-10-15

    IPC分类号: A23C1/10 A23L2/54

    摘要: The present invention relates to a method for producing a powdered porous product from at least one starting powdery and/or viscous product, characterised in that it comprises the continuous following steps without exposing the product to open air: a) preparing the starting product in order to make it viscous; b) in a thermo-mechanical machine (10) for continuously realising transport and/or mixing functions of viscous products or dry-material rich products, lowering the viscosity of the viscous product without changing its dry-material content, by intimate mixing with a gas injected into the processing machine (10) and simultaneously initiating the porosity in the viscous product; c) continuously with the processing machine (10), statically or dynamically intensifying the intimate mixture of the viscous product with a gas in order to obtain an aerated and porous mass; and d), dividing said mass in order to obtain aerated and porous particles.

    摘要翻译: 本发明涉及从至少一种起始粉末和/或粘性产品制备粉末状多孔产品的方法,其特征在于其包括连续的以下步骤,而不将产物暴露于露天:a)按顺序制备起始产物 使其粘稠; b)在热机械机器(10)中,用于连续实现粘性产品或干物质丰富产品的运输和/或混合功能,通过与一种或多种物质的紧密混合来降低粘性产品的粘度而不改变其干物质含量 气体注入加工机(10)并同时引发粘性产品中的孔隙率; c)与处理机(10)连续地静态地或动态地增强粘性产品与气体的紧密混合物,以获得充气和多孔质量; 和d),分割所述物质以获得充气和多孔颗粒。

    SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY PROVIDING A DUMMY PROCESSOR
    18.
    发明申请
    SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY PROVIDING A DUMMY PROCESSOR 失效
    通过提供一个DUMMY处理器来显示引导序列的系统和方法

    公开(公告)号:US20070288762A1

    公开(公告)日:2007-12-13

    申请号:US11423312

    申请日:2006-06-09

    IPC分类号: G06F12/14

    摘要: A system and method for masking a boot sequence by providing a dummy processor are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

    摘要翻译: 提供了一种通过提供虚拟处理器来掩蔽引导序列的系统和方法。 使用系统和方法,多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码,其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码,从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。

    System and method of automating the addition of programmable breakpoint hardware to design models
    19.
    发明申请
    System and method of automating the addition of programmable breakpoint hardware to design models 审中-公开
    将可编程断点硬件自动添加到设计模型的系统和方法

    公开(公告)号:US20070005323A1

    公开(公告)日:2007-01-04

    申请号:US11171760

    申请日:2005-06-30

    IPC分类号: G06F17/50

    摘要: Hardware logic for generating breakpoint signals based on state changes in observed (“tagged”) hardware resource of a design under test is automatically generated and added to the simulation model of the design under test. These breakpoints halt simulation when a user programmable event, such as an assertion, test-case failure, or trigger occurs. Allowing the end-user to define the register values used in comparison to or timing of tagged resources, results in breakpoints that can be created, changed, enabled, or disabled without rebuilding the simulation model. Because the breakpoint logic is in-circuit, it takes full advantage of the acceleration made possible by hardware simulators, while providing an interactive environment for both functional hardware verification and software development on the simulated hardware mode.

    摘要翻译: 根据被测设计的被观察(“标记”)硬件资源的状态变化产生断点信号的硬件逻辑被自动生成并添加到被测设计的仿真模型中。 当用户可编程事件(如断言,测试用例故障或触发器)发生时,这些断点将停止仿真。 允许最终用户定义与标记资源相比较或定时使用的寄存器值,导致可以创建,更改,启用或禁用的断点,而无需重建仿真模型。 由于断点逻辑是电路中的,它充分利用硬件仿真器可能实现的加速,同时为模拟硬件模式下的功能硬件验证和软件开发提供了一个交互式环境。

    System and method for test generation for system level verification using parallel algorithms
    20.
    发明申请
    System and method for test generation for system level verification using parallel algorithms 有权
    使用并行算法进行系统级验证的测试生成系统和方法

    公开(公告)号:US20060276998A1

    公开(公告)日:2006-12-07

    申请号:US11146987

    申请日:2005-06-06

    IPC分类号: G06F15/00

    CPC分类号: G06F11/263

    摘要: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.

    摘要翻译: 提供了一种使用并行算法进行系统级验证的测试生成系统和方法。 本发明通过利用并行算法的可扩展性同时允许数据集着色和预期结果检查来生成用于系统级测试的测试模式。 基于被测系统的特征,从多个可能的并行算法中选择迭代并行算法。 然后将所选择的并行算法分离成单独的程序语句以供多个处理器执行。 执行所选算法的串行版本以产生一组预期结果。 然后运行所选算法的设计的并行版本以生成与一组预期结果进行比较的一组测试结果数据。 如果两组数据匹配,则确定系统正常运行。