公开(公告)号：US20060152288A1

公开(公告)日：2006-07-13

申请号：US11031185

申请日：2005-01-07

申请人： Solti Peng ,  Chien-Chung Chen ,  Abdellatif Bellaouar ,  Heng-Chih Lin

发明人： Solti Peng ,  Chien-Chung Chen ,  Abdellatif Bellaouar ,  Heng-Chih Lin

IPC分类号： H03F1/22

CPC分类号： H03F1/30 ,  H03F3/189 ,  H03F2200/18 ,  H03F2200/456 ,  H03F2200/72

摘要： According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.

摘要翻译： 根据本发明的一个实施例，放大器包括栅极偏置电路，其可操作以产生栅极偏置电压和公共栅极放大器，该公共栅极放大器包括具有由栅极偏置电路的输出偏置的栅极的晶体管，并且源极连接到 电感器，用于为直流电流流过晶体管提供路径。 根据本发明的另一个实施例，一种用于放大放大器的信号的方法包括：生成指示放大器的参考电压和输出电压之间的差异的栅极偏置电压，使公共栅极放大器的栅极偏置 栅极偏置电压和被无源器件阻塞从晶体管的源极流到地的交流信号。

公开(公告)号：US20090088122A1

公开(公告)日：2009-04-02

申请号：US11862516

申请日：2007-09-27

申请人： Yang Xu ,  Solti Peng

发明人： Yang Xu ,  Solti Peng

IPC分类号： H04B1/28

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0084

摘要： A noise isolation passive mixing apparatus is designed to mitigate noise contribution from intermediate frequency (IF) filters and amplifiers in a radio frequency translation stage. Common-gate configuration devices are inserted between passive mixer output and input of a transimpedance amplifier. In this way, circulation of the input-referred noise of the transimpedance amplifier is decreased, because of the relatively high output impedance of the common-gate devices, and the noise figure of the mixing apparatus can be improved. Since the radio frequency signal still sees low impedance, a radio frequency transconductance (RF gm) stage can be removed from the mixing apparatus, reducing current consumption. A double-balanced mixing apparatus with this general architecture may be implemented in a 0.18 micrometer CMOS technology and used in a low-IF global positioning system operating at 1.575 GHz, in an access terminal of a cellular communication system, and in other systems.

摘要翻译： 噪声隔离无源混频装置设计用于减轻射频转换级中的中频（IF）滤波器和放大器的噪声贡献。 共栅配置器件插在无源混频器输出和跨阻放大器的输入之间。 以这种方式，由于共栅极器件的输出阻抗相对较高，跨阻抗放大器的输入参考噪声的循环减小，并且可以提高混合装置的噪声系数。 由于射频信号仍然看到低阻抗，可以从混合装置中去除射频跨导（RF gm）级，从而降低电流消耗。 具有这种一般架构的双平衡混合装置可以以0.18微米CMOS技术实现，并且用于在蜂窝通信系统的接入终端中操作的1.575GHz的低IF全球定位系统和其它系统。

公开(公告)号：US07453142B2

公开(公告)日：2008-11-18

申请号：US11294060

申请日：2005-12-05

申请人： See Taur Lee ,  Solti Peng ,  Dirk Leipold ,  James Fred Salzman

发明人： See Taur Lee ,  Solti Peng ,  Dirk Leipold ,  James Fred Salzman

IPC分类号： H01L23/52

CPC分类号： H01F27/2804 ,  H01F19/04 ,  H01F2027/2814 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/05553 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49433 ,  H01L2224/83801 ,  H01L2224/8389 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/83205

摘要： A transformer system includes a package substrate having a surface. A plurality of electrically conductive pads are arranged in spaced apart relationship relative to each other on the substrate surface. A first winding is defined by a first electrically conductive path between a first input and a first output, the first electrically conductive path including at least one wire connected between at least one first pad pair of the electrically conductive pads. At least one electrically conductive pad of each first pad pair is at the substrate surface. A second winding is defined by a second electrically conductive path between a second input and a second output, the second electrically conductive path including at least one wire connected between at least one second pad pair of the electrically conductive pads. At least one electrically conductive pad of each second pad pair is at the substrate surface. The first and second electrically conductive paths are proximal each other to achieve a magnetic field coupling between the first and second windings so as to form a transformer.

摘要翻译： 变压器系统包括具有表面的封装衬底。 多个导电焊盘在衬底表面上相对于彼此以间隔开的关系布置。 第一绕组由第一输入和第一输出之间的第一导电路径限定，第一导电路径包括连接在至少一个第一焊盘对的导电焊盘之间的至少一个导线。 每个第一焊盘对的至少一个导电焊盘位于衬底表面。 第二绕组由第二输入和第二输出之间的第二导电路径限定，第二导电路径包括连接在至少一个第二垫对导电焊盘之间的至少一根导线。 每个第二衬垫对的至少一个导电焊盘位于衬底表面。 第一和第二导电路径彼此靠近，以实现第一和第二绕组之间的磁场耦合，从而形成变压器。

公开(公告)号：US20120256613A1

公开(公告)日：2012-10-11

申请号：US13081239

申请日：2011-04-06

申请人： Abdellatif Bellaouar ,  Arul Balasubramaniyan ,  Solti Peng

发明人： Abdellatif Bellaouar ,  Arul Balasubramaniyan ,  Solti Peng

IPC分类号： G05F3/02

CPC分类号： H04B15/06

摘要： A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.

摘要翻译： 用于诸如压控振荡器（VCO）的功能电路的电源噪声抑制电路。 电源噪声抑制电路包括连接到电压源的隔离晶体管，用于在整个频率范围内提供基本上没有噪声的输出电流和电压。 电流源，二极管连接的参考晶体管，其电阻装置连接在其栅极和漏极端子之间，并且串联连接在电压源和地之间的虚拟电路产生施加到隔离晶体管的栅极的偏置电压。 虚拟电路模拟功能电路的DC特性，使得输出电流跟踪过程和温度变化。 隔离晶体管和参考晶体管可以具有负阈值电压，并且该电路可以包括用于从参考晶体管和隔离晶体管的栅极引出电流的放电装置。

公开(公告)号：US07936217B2

公开(公告)日：2011-05-03

申请号：US11947570

申请日：2007-11-29

申请人： Junxiong Deng ,  Gurkanwal Singh Sahota ,  Solti Peng

发明人： Junxiong Deng ,  Gurkanwal Singh Sahota ,  Solti Peng

IPC分类号： H03F3/18

CPC分类号： H03F1/3205 ,  H03F1/0261 ,  H03F1/086 ,  H03F1/3211 ,  H03F1/56 ,  H03F3/19 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/354 ,  H03F2200/451

摘要： A complementary amplifier includes an NMOS transistor coupled to a PMOS transistor in a stacked configuration. The NMOS transistor and the PMOS transistor receive and amplify an input signal. The NMOS and PMOS transistors operate as a linear complementary amplifier and provide an output signal. The NMOS and PMOS transistors may have separate bias voltages, which may be selected to overlap the low-to-high and high-to-low transitions of the transconductances of these transistors. The width and length dimensions of the NMOS and PMOS transistors may be selected to match the change in input capacitance and the change in transconductance of the NMOS transistor in moderate inversion region with the change in input capacitance and the change in transconductance of the PMOS transistor in moderate inversion region. The complementary amplifier may have an approximately constant total input capacitance and an approximately constant total transconductance over a range of voltages.

摘要翻译： 互补放大器包括以堆叠配置耦合到PMOS晶体管的NMOS晶体管。 NMOS晶体管和PMOS晶体管接收和放大输入信号。 NMOS和PMOS晶体管作为线性互补放大器工作并提供输出信号。 NMOS和PMOS晶体管可以具有单独的偏置电压，其可以被选择为与这些晶体管的跨导的低到高和高到低的跃迁重叠。 可以选择NMOS和PMOS晶体管的宽度和长度尺寸以匹配输入电容的变化和中等反转区中NMOS晶体管的跨导变化，随着输入电容的变化和PMOS晶体管的跨导变化 中等反转区。 互补放大器可以具有近似恒定的总输入电容和在一定范围的电压上的近似恒定的总跨导。

公开(公告)号：US20090140812A1

公开(公告)日：2009-06-04

申请号：US11947570

申请日：2007-11-29

申请人： Junxiong Deng ,  Gurkanwal Singh Sahota ,  Solti Peng

发明人： Junxiong Deng ,  Gurkanwal Singh Sahota ,  Solti Peng

IPC分类号： H03F3/16

CPC分类号： H03F1/3205 ,  H03F1/0261 ,  H03F1/086 ,  H03F1/3211 ,  H03F1/56 ,  H03F3/19 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/354 ,  H03F2200/451

摘要： A complementary amplifier includes an NMOS transistor coupled to a PMOS transistor in a stacked configuration. The NMOS transistor and the PMOS transistor receive and amplify an input signal. The NMOS and PMOS transistors operate as a linear complementary amplifier and provide an output signal. The NMOS and PMOS transistors may have separate bias voltages, which may be selected to overlap the low-to-high and high-to-low transitions of the transconductances of these transistors. The width and length dimensions of the NMOS and PMOS transistors may be selected to match the change in input capacitance and the change in transconductance of the NMOS transistor in moderate inversion region with the change in input capacitance and the change in transconductance of the PMOS transistor in moderate inversion region. The complementary amplifier may have an approximately constant total input capacitance and an approximately constant total transconductance over a range of voltages.

摘要翻译： 互补放大器包括以堆叠配置耦合到PMOS晶体管的NMOS晶体管。 NMOS晶体管和PMOS晶体管接收和放大输入信号。 NMOS和PMOS晶体管作为线性互补放大器工作并提供输出信号。 NMOS和PMOS晶体管可以具有单独的偏置电压，其可以被选择为与这些晶体管的跨导的低到高和高到低的跃迁重叠。 可以选择NMOS和PMOS晶体管的宽度和长度尺寸以匹配输入电容的变化和中等反转区中NMOS晶体管的跨导变化，随着输入电容的变化和PMOS晶体管的跨导变化 中等反转区。 互补放大器可以具有近似恒定的总输入电容和在一定范围的电压上的近似恒定的总跨导。

公开(公告)号：US06961013B2

公开(公告)日：2005-11-01

申请号：US10916728

申请日：2004-08-12

申请人： Heng-Chih Lin ,  Chien-Chung Chen ,  Solti Peng

发明人： Heng-Chih Lin ,  Chien-Chung Chen ,  Solti Peng

IPC分类号： H03M1/06 ,  H03M1/12 ,  H03M1/66 ,  H03M1/68

CPC分类号： H03M1/0641 ,  H03M1/687

摘要： A hybrid Nyquist thermometer and sigma delta digital to analog converter is presented. The digital input signal is divided into most significant bits and least significant bits. The most significant bits are converted to a thermometer code. A thermometer element array is controlled by the thermometer code. A fractional value is calculated from the least significant bits and used to dither the first unexercised array element in order to get finer resolution with guaranteed monotonicity.

公开(公告)号：US20050093729A1

公开(公告)日：2005-05-05

申请号：US10916728

申请日：2004-08-12

申请人： Heng-Chih Lin ,  Chien-Chung Chen ,  Solti Peng

发明人： Heng-Chih Lin ,  Chien-Chung Chen ,  Solti Peng

IPC分类号： H03M1/06 ,  H03M1/12 ,  H03M1/66 ,  H03M1/68

CPC分类号： H03M1/0641 ,  H03M1/687

摘要： A hybrid Nyquist thermometer and sigma delta digital to analog converter is presented. The digital input signal is divided into most significant bits and least significant bits. The most significant bits are converted to a thermometer code. A thermometer element array is controlled by the thermometer code. A fractional value is calculated from the least significant bits and used to dither the first unexercised array element in order to get finer resolution with guaranteed monotonicity.

摘要翻译： 提出了一种混合奈奎斯特温度计和西格玛delta数模转换器。 数字输入信号被分为最高有效位和最低有效位。 最高有效位被转换为温度计代码。 温度计元件阵列由温度计代码控制。 从最低有效位计算分数值，并用于抖动第一个未经排序的数组元素，以获得更精细的分辨率并保证单调性。