公开(公告)号：US08236693B2

公开(公告)日：2012-08-07

申请号：US11748743

申请日：2007-05-15

Applicant: Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

Inventor： Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

IPC: H01L21/44

CPC classification number: H01L21/324 ,  H01L21/28052 ,  H01L29/66507 ,  H01L29/78

Abstract: The gate and active regions of a device are formed and alternating steps of applying and removing nitride and oxide layers allows exposing silicon in different areas while keeping silicon or polysilicon in other area covered with nitride. Metal layers are deposited over the exposed silicon or polysilicon and annealing forms a silicide layer in the selected exposed areas. The oxide and/or nitride layers are removed from the covered areas and another metal layer is deposited. The anneal process is repeated with silicide of one thickness formed over the second exposed areas with additional thickness of silicide formed over the previous silicide thickness.

Abstract translation: 形成器件的栅极和有源区，并且施加和去除氮化物和氧化物层的交替步骤允许在不同区域暴露硅，同时保持覆盖有氮化物的其它区域中的硅或多晶硅。 金属层沉积在暴露的硅或多晶硅上，退火在所选择的暴露区域中形成硅化物层。 氧化物层和/或氮化物层从被覆盖区域移除，另一个金属层被沉积​​。 在第二暴露区域上形成一层厚度的硅化物，并在先前的硅化物厚度上形成附加的硅化物厚度来重复退火工艺。

公开(公告)号：US20100078815A1

公开(公告)日：2010-04-01

申请号：US12286149

申请日：2008-09-29

Applicant: Zheng Wang ,  Connie Wang ,  Erik Wilson ,  Wen Yu ,  Robert Chiu

Inventor： Zheng Wang ,  Connie Wang ,  Erik Wilson ,  Wen Yu ,  Robert Chiu

IPC: H01L23/52 ,  H01L21/44

CPC classification number: H01L23/485 ,  H01L21/76877 ,  H01L23/53252 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11517 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electrically conductive interconnect is provided through an opening in a dielectric layer, electrically connecting two conductive layers. In one embodiment, the interconnect is formed by ruthenium entirely filling the opening in the dielectric layer. In another embodiment, an adhesion layer of titanium is provided in the opening prior to providing the ruthenium. In using this approach, an aspect ratio (i.e., the ratio of the length of the interconnect to the width thereof) of 20:1 or greater is achievable.

Abstract translation: 导电互连通过介电层中的开口设置，电连接两个导电层。 在一个实施例中，互连由完全填充介电层中的开口的钌形成。 在另一个实施方案中，在提供钌之前，在开口中提供钛的粘附层。 在使用这种方法时，可实现20:1或更大的纵横比（互连长度与其宽度之比）。

公开(公告)号：US07468296B1

公开(公告)日：2008-12-23

申请号：US11290787

申请日：2005-11-30

Applicant: Ercan Adem ,  Matthew Buynoski ,  Robert Chiu ,  Bryan Choo ,  Calvin Gabriel ,  Joong Jeon ,  David Matsumoto ,  Jeffrey Shields ,  Bhanwar Singh ,  Winny Stockwell ,  Wen Yu

Inventor： Ercan Adem ,  Matthew Buynoski ,  Robert Chiu ,  Bryan Choo ,  Calvin Gabriel ,  Joong Jeon ,  David Matsumoto ,  Jeffrey Shields ,  Bhanwar Singh ,  Winny Stockwell ,  Wen Yu

IPC: H01L21/8234 ,  H01L27/10

CPC classification number: H01L27/1021

Abstract: In fabricating an electronic structure, a substrate is provided, and a first barrier layer is provided on the substrate. A germanium thin film diode is provided on the first barrier layer, and a second barrier layer is provided on the germanium thin film diode. A memory device is provided over and connected to the second barrier layer.

Abstract translation: 在制造电子结构时，提供基板，并且在基板上设置第一阻挡层。 锗薄膜二极管设置在第一阻挡层上，第二阻挡层设置在锗薄膜二极管上。 存储器件设置在第二阻挡层上并连接到第二阻挡层。

公开(公告)号：US20060201665A1

公开(公告)日：2006-09-14

申请号：US11076007

申请日：2005-03-09

Applicant: Wen Yu ,  Peter Fredrickson

Inventor： Wen Yu ,  Peter Fredrickson

IPC: F28F1/00

CPC classification number: F28D1/0391 ,  B21C37/08 ,  B21C37/0803 ,  B21C37/083 ,  B21C37/155 ,  B21C37/158 ,  F28F1/42 ,  F28F1/426 ,  F28F3/042 ,  F28F2225/04 ,  Y10T29/49391

Abstract: A heat transfer tube for a heat exchanger and a method of manufacturing such a tube. The heat transfer tube includes opposing top and bottom walls and end walls connecting the top and bottom walls to each other. The top and bottom walls each define a substantially planar surface and the end walls each define a generally curved surface. The end walls each including deformations formed therein to strengthen the heat transfer tube.

Abstract translation: 一种热交换器用传热管及其制造方法。 传热管包括将顶壁和底壁彼此连接的相对的顶壁和底壁以及端壁。 顶壁和底壁各限定一个基本平坦的表面，并且端壁各限定一个大致弯曲的表面。 端壁各自包括形成在其中的变形，以加强传热管。

公开(公告)号：US06998928B2

公开(公告)日：2006-02-14

申请号：US10430099

申请日：2003-05-06

Applicant: Robert E. Stengel ,  Wen Yu

Inventor： Robert E. Stengel ,  Wen Yu

IPC: H03K7/08

CPC classification number: H03L7/0812 ,  H03K5/131 ,  H03K5/133 ,  H03K7/08 ,  H03L7/0891

Abstract: A digital technique for pulse width modulation (PWM) utilizes a tapped delay line 304 receiving a reference clock and generating a plurality of time delayed reference clock transitions having finer time resolution than the reference clock signal. A multiplexer 120 receives the plurality of time delayed reference clock transitions as an input thereto and producing an output when one of the plurality of time delayed reference clock transitions is addressed. An accumulator circuit 524 generates control timing signals associated with the input signal sampling rate Fsample that are used to select outputs from the delay line 304 representing a pulse width modulated output signal.

Abstract translation: 用于脉冲宽度调制（PWM）的数字技术利用抽头延迟线304接收参考时钟并产生具有比参考时钟信号更精细的时间分辨率的多个时间延迟的参考时钟转变。 多路复用器120接收多个时间延迟的参考时钟转换作为其输入，并且在多个时间延迟的参考时钟转换中的一个被寻址时产生输出。 累加器电路524产生与用于选择来自表示脉冲宽度调制输出信号的延迟线304的输出的输入信号采样率F SUB样本相关联的控制定时信号。

公开(公告)号：US20050264360A1

公开(公告)日：2005-12-01

申请号：US10855861

申请日：2004-05-27

Applicant: Fan Ma ,  Wen Yu

Inventor： Fan Ma ,  Wen Yu

IPC: H03G1/00 ,  H03G3/30

CPC classification number: H03G1/0088

Abstract: A DSM variable high-gain circuit includes a differential amplifier and a negative feedback loop comprising low resistance poly resistors and switches configured in a T-structure having a junction point as part of the negative feedback loop. A third resistor branch of the T-structure includes a switch that connects the junction point through the third resistor branch to ground when in a closed state and that turns the third resistor branch into an open circuit when in an open state The switch of the third resistor branch, when in the closed state, produces a gain at the output of the variable high-gain circuit.

Abstract translation: DSM可变高增益电路包括差分放大器和负反馈回路，其包括以具有作为负反馈回路的一部分的连接点的T形结构中配置的低电阻多电阻器和开关。 T型结构的第三电阻器支路包括开关，当处于闭合状态时，将通过第三电阻器分支的接合点连接到地，并且当处于断开状态时将第三电阻器分支转变为开路。第三个开关 当处于闭合状态时，电阻分支在可变高增益电路的输出端产生增益。

公开(公告)号：US06927162B1

公开(公告)日：2005-08-09

申请号：US10782874

申请日：2004-02-23

Applicant: Wen Yu ,  Jinsong Yin ,  Connie Pin-Chin Wang ,  Paul Besser ,  Keizaburo Yoshie

Inventor： Wen Yu ,  Jinsong Yin ,  Connie Pin-Chin Wang ,  Paul Besser ,  Keizaburo Yoshie

IPC: H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/76843 ,  H01L21/76855 ,  H01L21/76856

Abstract: A method of forming a contact in a semiconductor device deposits a refractory metal contact layer in a contact hole on a conductive region portion in a silicon substrate. The refractory metal contact layer is reacted with the silicide region prior to a plasma treatment of a contact barrier metal layer formed within the contact hole. This prevents portions of the refractory metal contact layer from being nitridated prior to conversion to silicide.

Abstract translation: 在半导体器件中形成接触的方法将难熔金属接触层沉积在硅衬底中的导电区域上的接触孔中。 在等离子体处理形成在接触孔内的接触阻挡金属层之前，难熔金属接触层与硅化物区域反应。 这样可以防止难熔金属接触层的部分在转化成硅化物之前被氮化。

公开(公告)号：US20050039900A1

公开(公告)日：2005-02-24

申请号：US10643406

申请日：2003-08-19

Applicant: Wen Yu

Inventor： Wen Yu

IPC: F28F9/02 ,  F28F9/18

CPC classification number: F28F9/02 ,  F28F9/182 ,  Y10S165/906

Abstract: A header for a heat exchanger includes a substantially planar base portion and a pair of step portions. The step portions are angled from the plane of the base portion. The header is also provided with a plurality of substantially parallel slots spaced apart along the length of the header. Each slot has an elongate section extending across the width of the base portion and end sections extending from the elongate section into the step portions of the header.

Abstract translation: 热交换器的集管包括基本平坦的基部和一对台阶部。 阶梯部分从基部的平面成角度。 头部还设置有沿着头部的长度间隔开的多个基本上平行的狭槽。 每个狭槽具有延伸穿过基部的宽度的细长部分和从细长部分延伸到集管的台阶部分的端部部分。

公开(公告)号：US11009293B2

公开(公告)日：2021-05-18

申请号：US16968622

申请日：2019-02-01

Applicant: Wen Yu

Inventor： Wen Yu

IPC: H05B7/144 ,  F27D11/08 ,  F27D3/18 ,  G01R31/42 ,  F27D11/10 ,  H05B7/148 ,  F27D11/12

Abstract: A direct current smelting electric furnace includes a rectifying control circuit, a rectifying power supply device, a short network device, a multi-load layout device including multiple electrodes, and an electric furnace body. The rectifying power supply device includes at least two double-circuit direct current power supply packs. Four output terminals of each double-circuit direct current power supply pack are connected to three electrodes in the multi-load layout device by the short network device to constitute two current circuits by an electric furnace weld pool load. Each electrode in the multi-load layout device is connected to homo-polar output terminals of a three-phase negative semi-cycle rectifying output circuit and a three-phase positive semi-cycle rectifying output circuit, separately. The rectifying power supply device-includes multiple output current circuits. The number of output current circuits of the rectifying power supply device is the same as the number of electrodes in the multi-load layout device.

公开(公告)号：US09299643B2

公开(公告)日：2016-03-29

申请号：US12286149

申请日：2008-09-29

Applicant: Zheng Wang ,  Connie Wang ,  Erik Wilson ,  Wen Yu ,  Robert Chiu

Inventor： Zheng Wang ,  Connie Wang ,  Erik Wilson ,  Wen Yu ,  Robert Chiu

IPC: H01L29/40 ,  H01L23/485 ,  H01L21/768 ,  H01L23/532 ,  H01L27/105 ,  H01L27/115

CPC classification number: H01L23/485 ,  H01L21/76877 ,  H01L23/53252 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11517 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electrically conductive interconnect is provided through an opening in a dielectric layer, electrically connecting two conductive layers. In one embodiment, the interconnect is formed by ruthenium entirely filling the opening in the dielectric layer. In another embodiment, an adhesion layer of titanium is provided in the opening prior to providing the ruthenium. In using this approach, an aspect ratio (i.e., the ratio of the length of the interconnect to the width thereof) of 20:1 or greater is achievable.

Abstract translation: 导电互连通过介电层中的开口设置，电连接两个导电层。 在一个实施例中，互连由完全填充介电层中的开口的钌形成。 在另一个实施方案中，在提供钌之前，在开口中提供钛的粘附层。 在使用这种方法时，可实现20:1或更大的纵横比（互连长度与其宽度之比）。