公开(公告)号：US20080320216A1

公开(公告)日：2008-12-25

申请号：US12142885

申请日：2008-06-20

申请人： Matthias Fertig ,  Ute Gaertner ,  Norbert Hagspiel ,  Erwin Pfeffer

发明人： Matthias Fertig ,  Ute Gaertner ,  Norbert Hagspiel ,  Erwin Pfeffer

IPC分类号： G06F12/00

CPC分类号： G06F12/1036

摘要： A program product, a translation lookaside buffer and a related method for operating the TLB is provided. The method comprises the steps of: a) when adding an entry for a virtual address to said TLB testing whether the attribute data of said virtual address is already stored in said CAM and if the attribute data is not stored already in said CAM, generating tag data for said virtual address such that said tag data is different from the tag data generated for the other virtual addresses currently stored in said RAM and associated to the new entry in said CAM for the attribute data, adding the generated tag data to said RAM and to the associated entry in said CAM, and setting a validity flag in said CAM for said associated entry; else if the attribute data is stored already in said CAM, adding the stored attribute data to the entry in said RAM for said virtual address; and when performing a TLB lookup operation: reading the validity flag and the tag data from the entry in said CAM, which is associated to the entry in said RAM for said virtual address, and simultaneously reading the absolute address and the tag data from the entry in said RAM for said virtual address, and generating a TLB hit only if the tag data read from said CAM is valid and matches the tag data read from said RAM.

摘要翻译： 提供了一种程序产品，翻译后备缓冲器和用于操作TLB的相关方法。 该方法包括以下步骤：a）当向所述TLB添加虚拟地址的条目时，测试所述虚拟地址的属性数据是否已经存储在所述CAM中，并且属性数据是否已经存储在所述CAM中，生成标签 用于所述虚拟地址的数据，使得所述标签数据不同于当前存储在所述RAM中并与所述CAM中的新条目相关联的用于属性数据的其他虚拟地址生成的标签数据，将生成的标签数据添加到所述RAM， 到所述CAM中的相关联的条目，并且在所述CAM中为所述相关联的条目设置有效标志; 否则如果属性数据已经存储在所述CAM中，则将存储的属性数据添加到用于所述虚拟地址的所述RAM中的条目; 并且当执行TLB查找操作时：从与所述RAM中的所述虚拟地址的条目相关联的所述CAM中的条目读取有效性标志和标签数据，并同时从所述条目读取绝对地址和标签数据 在所述RAM中用于所述虚拟地址，并且仅当从所述CAM读取的标签数据有效并且与从所述RAM读取的标签数据匹配时才产生TLB命中。

公开(公告)号：US20050055544A1

公开(公告)日：2005-03-10

申请号：US10900537

申请日：2004-07-28

申请人： Ute Gaertner ,  Erwin Pfeffer ,  Charles Webb

发明人： Ute Gaertner ,  Erwin Pfeffer ,  Charles Webb

IPC分类号： G06F9/32 ,  G06F15/00

CPC分类号： G06F9/30054 ,  G06F9/30058

摘要： The present invention relates to a central processing unit comprising: (a) a number of functional units (A, B, . . . , N), (b) at least one module for processing of a function call received from one of the functional units, the module having a decoder to obtain an instruction address from the function call, a memory for storing a plurality of control instructions and for storing a plurality of branch instructions, each control instruction having an assigned instruction address for a next instruction and each branch instruction having assigned at least two alternative instruction addresses for a next instruction, first logic circuitry for processing of the branch instructions in order to select one of the at least two alternative instruction addresses of one of the branch instructions, second logic circuitry for processing of the control instructions in order to return a result in response to the function call.

摘要翻译： 本发明涉及一种中央处理单元，包括：（a）多个功能单元（A，B，...，N），（b）至少一个模块，用于处理从功能性 单元，该模块具有从功能调用获得指令地址的解码器，用于存储多个控制指令并存储多个分支指令的存储器，每个控制指令具有分配的下一个指令的指令地址和每个分支 为下一个指令分配了至少两个备选指令地址的指令，第一逻辑电路，用于处理分支指令以便选择一个分支指令的至少两个备选指令地址之一;第二逻辑电路，用于处理 控制指令，以便响应函数调用返回结果。

公开(公告)号：US20120011341A1

公开(公告)日：2012-01-12

申请号：US13234374

申请日：2011-09-16

申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Gustav E. Sittmann

发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Gustav E. Sittmann

IPC分类号： G06F12/10

CPC分类号： G06F12/1027 ,  G06F12/1009 ,  G06F2212/651 ,  G06F2212/652

摘要： What is provided is a load page table entry address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which contains an opcode indicating that a load page table entry address function is to be performed. The machine instruction contains an M field, a first field identifying a first general register, and a second field identifying a second general register. Based on the contents of the M field, an initial origin address of a hierarchy of address translation tables having at least one segment table is obtained. Based on the obtained initial origin address, dynamic address translation is performed until a page table entry is obtained. The page table entry address is saved in the identified first general register.

摘要翻译： 提供了为计算机系统的机器结构定义的加载页表项地址函数。 在一个实施例中，获得机器指令，其中包含指示要执行加载页表项地址函数的操作码。 机器指令包含M字段，标识第一通用寄存器的第一字段和标识第二通用寄存器的第二字段。 基于M场的内容，获得具有至少一个分段表的地址转换表的层次结构的初始起始地址。 基于获得的初始起始地址，执行动态地址转换，直到获得页表项。 页表入口地址保存在识别的第一个通用寄存器中。

公开(公告)号：US08082405B2

公开(公告)日：2011-12-20

申请号：US11972682

申请日：2008-01-11

申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/1475 ,  G06F12/1036 ,  G06F12/109

摘要： In an enhanced dynamic address translation facility a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are used to access a segment table entry containing a format control field and an access validity field. If the format control field is enabled, the segment table entry further contains an access control field and a fetch protection field and a segment-frame absolute address. Fetch operations from the desired block of data are permitted if the program access key associated with the virtual address is equal to the segment access control field.

摘要翻译： 在增强型动态地址转换装置中，使用要转换的虚拟地址和转换表层级的转换表的初始起始地址来访问包含格式控制字段和访问有效性字段的段表条目。 如果格式控制字段被使能，则段表条目还包含访问控制字段和取指保护字段和段帧绝对地址。 如果与虚拟地址相关联的程序访问密钥等于段访问控制字段，则允许从所需数据块获取操作。

公开(公告)号：US07975182B2

公开(公告)日：2011-07-05

申请号：US12036430

申请日：2008-02-25

申请人： Debbie A. St. Onge ,  Jane H. Bartik ,  Barry W. Krumm ,  Erwin Pfeffer ,  Chung-Lung Kevin Shum

发明人： Debbie A. St. Onge ,  Jane H. Bartik ,  Barry W. Krumm ,  Erwin Pfeffer ,  Chung-Lung Kevin Shum

IPC分类号： G06F11/00

CPC分类号： G06F11/3466 ,  G06F11/3461 ,  G06F2201/885

摘要： There is provided a method, system and computer program product for generating trace data related to a data processing system event. The method includes: receiving an instruction relating to the system event from a location in the system; determining a minimum number of trace segment records required to record instruction information; and creating a trace segment table including the number of trace segment records, the number of trace segment records including at least one instruction record.

摘要翻译： 提供了一种用于生成与数据处理系统事件相关的跟踪数据的方法，系统和计算机程序产品。 该方法包括：从系统中的位置接收与系统事件有关的指令; 确定记录指令信息所需的跟踪段记录的最小数量; 并创建包括跟踪段记录的数量的跟踪段表，包括至少一个指令记录的跟踪段记录的数目。

公开(公告)号：US20090216992A1

公开(公告)日：2009-08-27

申请号：US12037268

申请日：2008-02-26

申请人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer

发明人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer

IPC分类号： G06F12/10

CPC分类号： G06F12/0284 ,  G06F3/0604 ,  G06F3/0667 ,  G06F3/067 ,  G06F9/455 ,  G06F12/10 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109 ,  G06F2212/1032 ,  G06F2212/152 ,  G06F2212/50 ,  G06F2212/652 ,  G06F2212/657

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Dynamic address translation of the virtual address proceeds. In response to a translation interruption having occurred during dynamic address translation, bits are stored in a translation exception qualifier (TXQ) field to indicate that the exception was either a host DAT exception having occurred while running a host program or a host DAT exception having occurred while running a guest program. The TXQ is further capable of indicating that the exception was associated with a host virtual address derived from a guest page frame real address or a guest segment frame absolute address. The TXQ is further capable of indicating that a larger or smaller host frame size is preferred to back a guest frame.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 虚拟地址的动态地址转换进行。 响应于在动态地址转换期间发生的翻译中断，比特被存储在转换异常限定符（TXQ）字段中，以指示异常是在运行主机程序或主机DAT异常发生时发生的主机DAT异常 同时运行一个客人程序。 TXQ还能够指示异常与从访客页面帧实际地址或访客段帧绝对地址导出的主机虚拟地址相关联。 TXQ还能够指示较大或较小的主机帧大小优于后端客机帧。

公开(公告)号：US20090182974A1

公开(公告)日：2009-07-16

申请号：US11972682

申请日：2008-01-11

申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles E. Webb

IPC分类号： G06F12/10

CPC分类号： G06F12/1475 ,  G06F12/1036 ,  G06F12/109

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Based on the origin address, a segment table entry is obtained which contains a format control field and an access validity field. If the format control and access validity are enabled, the segment table entry further contains an access control and fetch protection fields, and a segment-frame absolute address. Store operations to the block of data are permitted only if the access control field matches a program access key provided by either a Program Status Word or an operand of a program instruction being executed. Fetch operations from the desired block of data are permitted only if the program access key associated with the virtual address is equal to the segment access control field.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 基于原始地址，获得包含格式控制字段和访问有效性字段的段表条目。 如果启用格式控制和访问有效性，则段表条目还包含访问控制和提取保护字段以及段帧绝对地址。 仅当访问控制字段与由程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许对数据块进行存储操作。 只有当与虚拟地址相关联的程序访问密钥等于段访问控制字段时，才允许从所需数据块获取操作。

公开(公告)号：US20090182964A1

公开(公告)日：2009-07-16

申请号：US11972706

申请日：2008-01-11

申请人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

发明人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

IPC分类号： G06F12/10 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F2212/1044 ,  G06F2212/652

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual address is used to reference an entry in the translation table. If the format control field is enabled, a frame address of a large block of data in main storage is obtained from the translation table entry. The large block of data is a block of at least 1M byte in size. The frame address is then combined with an offset portion of the virtual address to form the translated address of a desired block of data within the large block of data in main storage. The desired large block of data addressed by the translated address is then accessed.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 虚拟地址的索引部分用于引用转换表中的条目。 如果启用格式控制字段，则从转换表条目获得主存储器中的大数据块的帧地址。 大块数据是至少1M字节的块。 然后将帧地址与虚拟地址的偏移部分组合，以在主存储器中的大量数据块内形成期望的数据块的转换地址。 然后访问由翻译的地址寻址的期望的大量数据。

公开(公告)号：US08631216B2

公开(公告)日：2014-01-14

申请号：US13345938

申请日：2012-01-09

申请人： Dan F Greiner ,  Lisa C Heller ,  Damian L Osisek ,  Erwin Pfeffer ,  Timothy J Siegel ,  Charles F Webb

发明人： Dan F Greiner ,  Lisa C Heller ,  Damian L Osisek ,  Erwin Pfeffer ,  Timothy J Siegel ,  Charles F Webb

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/1009 ,  G06F9/30054 ,  G06F9/30101 ,  G06F9/455 ,  G06F12/1045 ,  G06F12/109 ,  G06F12/1475

摘要： A translation table entry contains a change recording override field for controlling whether a change bit is to be set on a store or not. Each 4K byte block of main storage has an associated storage key comprising a change bit. The change recording override field controls whether the change bit of the storage key associated with the desired 4K byte block of main storage is set to 1 for a store operation.

摘要翻译： 翻译表条目包含用于控制是否在商店上设置更改位的改变记录覆盖字段。 主存储器的每个4K字节块具有包括改变位的相关联的存储密钥。 更改记录覆盖字段控制与存储操作的主存储器的期望的4K字节块相关联的存储密钥的改变位是否被设置为1。

公开(公告)号：US08527715B2

公开(公告)日：2013-09-03

申请号：US12037177

申请日：2008-02-26

申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

IPC分类号： G06F13/00

CPC分类号： G06F12/00 ,  G06F12/0284 ,  G06F12/109 ,  G06F12/1441 ,  G06F2212/656

摘要： A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed.

摘要翻译： 一种用于提供共享存储器翻译设备的系统，方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求，在共享存储器转换机制处接收。 确定存储器地址是指共享存储器对象（SMO），SMO可由多个配置访问。 响应于确定存储器地址是指SMO，确定配置是否可以访问SMO。 响应于确定配置可以访问SMO，请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许在多个配置之间直接互换数据。