Abstract:
In a synchronized data communication on a one-wired bus, it transmits and receives a synchronizing signal that segments part of or all proportions of the data signal by use of three electrically distinguishable statuses for the identifier of the synchronizing signal and the logic states of the data signal to increase the endurance of frequency displacement and resist influences of the interference of external conditions, low quality of transmission medium, and limitation of transmission distance and make the reliability and correctness of the signal transmission improve substantially. It is also clearly illustrated the feasibility and simplicity for implementing the one-wired synchronized communication by a plurality of exemplary signal types and a transceiver circuitry.
Abstract:
A pulse width modulator includes an amplifier module, a comparator module, and a filter module. The amplifier module receives a feedback voltage signal from a passive network, and generates first and second non-inverted voltage signals and first and second inverted voltage signals in response to the feedback voltage signal. The comparator module receives the first and second non-inverted voltage signals and the first and second inverted voltage signals, and provides first and second differential voltage signals corresponding to the first and second non-inverted voltage signals and the first and second inverted voltage signals. The filter module is coupled between the amplifier module and the comparator module, and is operable so as to attenuate high frequency components of the first and second non-inverted voltage signals. As such, the presence of noise in the feedback voltage signal does not affect differential operation of the comparator module.
Abstract:
An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90° due to the capacitor coupled with the first mirror current source. The mirror resistor set can be resistors having one common terminal grounded, and other terminals each, respectively, coupled with the first and the second transistor and the capacitor, or can be composed of transistors and all of them with gate property biased so that the transistors in the mirror resistor set are operated in an ohmic region. The second mirror current provides an output current of the inductor equivalent circuit for next cascade stage.
Abstract:
The present invention discloses a half-voltage headphone driver circuit, comprising: at least one operational amplifier providing an output to a headphone speaker, and a charge pump receiving a supply voltage (VDD), generating a positive half-voltage and a negative half-voltage (VDD/2 and −VDD/2) based on the supply voltage, and supplying the positive half-voltage and negative half-voltage as high and low operation levels to the at least one operational amplifier.
Abstract:
The present invention discloses a half-voltage headphone driver circuit, comprising: at least one operational amplifier providing an output to a headphone speaker, and a charge pump receiving a supply voltage (VDD), generating a positive half-voltage and a negative half-voltage (VDD/2 and −VDD/2) based on the supply voltage, and supplying the positive half-voltage and negative half-voltage as high and low operation levels to the at least one operational amplifier.
Abstract:
An apparatus and method for reducing the die area of a PWM controller include a protection circuit triggered by a fault index signal for counting, and the counting time is provided for a delay time required by fault verification. Therefore, fault detection circuits can be eliminated and the purpose of reducing the die area can be achieved.
Abstract:
A linear voltage regulator comprises a transistor for converting a supply voltage to an output voltage. By directly monitoring the supply voltage and thereby rapidly responding when the supply voltage suffers a ripple, the linear voltage regulator enhances the stability of the output voltage.
Abstract:
A programmable voltage supervisory circuit and method with minimum programming pins and low quiescent current is provided to monitor a supply voltage, by which only one programming pin can configure three voltage levels for the threshold voltage to be compared to the supply voltage. The programming pin is connected with a voltage select signal that is defined to be high, low or floating states each determines a setting voltage among three levels corresponding to the three threshold voltages, respectively, by a voltage select circuit. A sample/hold circuit in combination with a switch arrangement is further connected to the voltage select circuit such that the programmable voltage supervisory circuit is only operationable during the duty of a clock and thereby to reduce the power consumption thereof by squeezing the duty.
Abstract:
A feedback circuit for an isolated power converter includes an opto-coupler and a reversed polarity regulator. The opto-coupler provides a current related to an output voltage of the isolated power converter. When the isolated power converter enters light load, the output voltage rises and the reversed polarity regulator reduces the current to decrease the power consumption and thus improve the light load efficiency of the isolated power converter.
Abstract:
A flyback voltage converter includes a transformer having a primary winding and a secondary winding, a switch serially connected to the primary winding for being switched to produce a current in the secondary winding, and a negative lock loop to adjust the peak value of the current in the secondary winding according to a current conduction time during which the current in the secondary winding is higher than a current threshold, such that the peak value of the current in the secondary winding will be in inverse proportion to the time.